similar to: Resampler experimental speedups

Hi All, I've been successfully using the with function for analyses and the transform function for multiple transformations. Then I thought, why not use "with" for both? I ran into problems & couldn't figure them out from help files or books. So I created a simplified version of what I'm doing: rm( list=ls() ) x1<-c(1,3,3) x2<-c(3,2,1) x3<-c(2,5,2)

I am having the following error in my function function(theta,reqdIRR) { theta1<-theta[1] theta2<-theta[2] n<-length(reqdIRR) constant<- n*(theta1+theta2) sum1<-lapply(reqdIRR*exp(theta1),FUN = sum) sum2<-lapply(exp(theta2 - reqdIRR*exp(theta1)),FUN = sum) sum = sum1 + sum2 log.fcn = constant - as.numeric(sum) result = - log.fcn return(result) } *error :

From: Thorvald Natvig <slicer at users.sourceforge.net> Some optimizing compilers miscompile the current SSE optimizations when full optimizations are enabled. By using output value pointer instead of a return value, we can bypass this misbehaviour. --- libspeex/resample.c | 8 ++++---- libspeex/resample_sse.h | 24 ++++++++---------------- 2 files changed, 12 insertions(+), 20

Greetings. For R gurus this may be a no brainer, but I could not find pointers to efficient computation of this beast in past help files. Background - I wish to implement a Cramer-von Mises type test statistic which involves double sums of max(X_i,Y_j) where X and Y are vectors of differing length. I am currently using ifelse pointwise in a vector, but have a nagging suspicion that there is a

The attached patch eliminates some warnings while compiling for ARM4 targets. It also simplifies the asm constraints a bit. Now we can use the ARM4 optimisations when compiling for PortalPlayer targets in Rockbox. Cheers, Dan -------------- next part -------------- A non-text attachment was scrubbed... Name: speex_arm4.patch Type: text/x-diff Size: 1550 bytes Desc: not available Url :

The following series adds initial vector support for PowerPC64. On POWER9, flac --best is about 3.3x faster. Amitay Isaacs (2): Add m4 macro to check for C __attribute__ features Check if compiler supports target attribute on ppc64 Anton Blanchard (5): configure.ac: Remove SPE detection code configure.ac: Add VSX enable/disable configure.ac: Fix FLAC__CPU_PPC on little endian, and add

Hello! # I have 3 vectors of values: values1<-rnorm(10) values2<-rnorm(10) values3<-rnorm(10) # In real life, all 3 vectors have a length of 25 # I create all possible combinations of 4 based on 10 elements: mycombos<-expand.grid(1:10,1:10,1:10,1:10) dim(mycombos) # Removing rows that contain pairs of identical values in any 2 of these columns: mycombos<-mycombos[!(mycombos$Var1

Maybe security related mails should be sent elsewhere? I didn't notice any so here it goes: sender.c:receive_sums() s->count = read_int(f); .. s->sums = (struct sum_buf *)malloc(sizeof(s->sums[0])*s->count); if (!s->sums) out_of_memory("receive_sums"); for (i=0; i < (int) s->count;i++) { s->sums[i].sum1 = read_int(f);

Jean-Marc, At least VS2005 (what I'm using) won't compile resample_sse.h with _USE_SSE2 defined because it refuses to cast __m128 to __m128d and vice versa. While there are intrinsics to do the casts, I thought it would be simpler to just use an intrinsic that accomplishes the same thing without all the casting. Thanks, --John @@ -91,7 +91,7 @@ static inline double

Mark II of the patch set. The first patch (dynsumlen2.patch) increments the protocol version to support per-file dynamic block checksum sizes. It is a prerequisite for varsumlen2.patch. varsumlen2.patch implements per-file dynamic block and checksum sizes. The current block size calculation only applies to files between 7MB and 160MB setting the block size to 1/10,0000 of the file length for a

The attached patch cleans up Opus's x86 intrinsics configury. It: * Makes ?enable-intrinsics work with clang and other non-GCC compilers * Enables RTCD for the floating-point-mode SSE code in Celt. * Disables use of RTCD in cases where the compiler targets an instruction set by default. * Enables the SSE4.1 Silk optimizations that apply to the common parts of Silk when Opus is built in

Hi, I run this code to get the power of the test for modified bartlett's test..but I'm not really sure that my coding is right.. #normal distribution unequal variance asim<-5000 pv<-rep(NA,asim) for(i in 1:asim) {print(i) set.seed(i) n1<-20 n2<-20 n3<-20 mu<-0 sd1<-sqrt(25) sd2<-sqrt(50) sd3<-sqrt(100) g1<-rnorm(n1,mu,sd1) g2<-rnorm(n2,mu,sd2)

From: Jonathan Lennox <jonathan at vidyo.com> * Makes ?enable-intrinsics work with clang and other non-GCC compilers * Enables RTCD for the floating-point-mode SSE code in Celt. * Disables use of RTCD in cases where the compiler targets an instruction set by default. * Enables the SSE4.1 Silk optimizations that apply to the common parts of Silk when Opus is built in floating-point mode, not

From: Jonathan Lennox <jonathan at vidyo.com> * Makes ?enable-intrinsics work with clang and other non-GCC compilers * Enables RTCD for the floating-point-mode SSE code in Celt. * Disables use of RTCD in cases where the compiler targets an instruction set by default. * Enables the SSE4.1 Silk optimizations that apply to the common parts of Silk when Opus is built in floating-point mode, not

Hi, Is there a sure way to test 2 cd's if they are true copies in rsync. I have tried this... rsync -avv /mnt/cdrom/ /mnt/cdrom2 ** result....quite shotened... misc/rpm2header is uptodate pkg-9.2-FiveStar-download-i586.idx is uptodate total: matches=0 tag_hits=0 false_alarms=0 data=0 wrote 65301 bytes read 20 bytes 1789.62 bytes/sec total size is 679261427 speedup is 10398.82 ** Is

Hello, I am attempting to grep the contents of a key file I have SCP'd to a remote server. I am able to cat it: [code] [bluethundr at LBSD2:~]$:ssh root at sum1 cat /root/id_rsa.pub root at lcent01.summitnjhome.com's password: ssh-rsa

Hi all, I'm interested in the impact of representing code via intrinsic functions, in contrast to via an instruction, when it comes to performing dead instruction/code elimination. As a concrete example, lets consider the simple case of the llvm.*.with.overflow.* intrinsics. If I have some sequence (> 1) of llvm.*.with.overflow.* intrinsics, as in the form of: @global = global i32 0

On 01/08/14 19:37, Reid Kleckner wrote: > What happens if you drop appending linkage? I think it will just work, > since you are already using a custom section, which will ensure that all > the data appears contiguously in memory. Thanks for the suggestion, but it still puts everything in a single .section statement. > Although, I do worry about what LLVM's alias analysis will

Hi All, Since I continue to base my work on top of Jonathan's patch, and my previous Ne10 fft/ifft/mdct_forward/backward patches, I thought it would be better to just post all new patches as a patch series. Please let me know if anyone disagrees with this approach. You can see wip branch of all latest patches at https://git.linaro.org/people/viswanath.puttagunta/opus.git Branch:

Hi Timothy, As I mentioned earlier [1], I now fixed compile issues with fixed point and resubmitting the patch. I also have new patch that does intrinsics optimizations for celt_pitch_xcorr targetting aarch64. You can find my latest work-in-progress branch at [2] For reference, you can use the Ne10 pre-built libraries at [3] Note that I am working with Phil at ARM to get my patch at [4]