similar to: Speex-1.1.7 seems to crash with --enable-sse (on P3/GCC-3.2)..

Displaying 20 results from an estimated 200 matches similar to: "Speex-1.1.7 seems to crash with --enable-sse (on P3/GCC-3.2).."

2005 Apr 20
2
Speex-1.1.7 seems to crash with --enable-sse (on P3/GCC-3.2)..
<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> <html> <head> <meta content="text/html;charset=ISO-8859-1" http-equiv="Content-Type"> <title></title> </head> <body bgcolor="#ffffff" text="#000000"> <b></b>Hi,<br> <br> I also tried to build speex
2005 Apr 20
0
Speex-1.1.7 seems to crash with --enable-sse (on P3/GCC-3.2)..
Hi, To increase the stack size, you can increase the value in the speex_alloc() call in nb_celp.c. Let me know if it solves the problem. Also, what compiler are you using. I think some older versions of gcc may have problems with SSE intrinsics. Jean-Marc Le mardi 19 avril 2005 ? 16:02 +0200, jehan Monnier a ?crit : > Hi, > > I also tried to build speex 1.1.7 with sse enabled on a
2004 Aug 06
2
Coredumps when --enable-sse is selected
System: Linux 2.4.25, glibc-2.3.2, gcc-3.2.3 (weird palindrome there), on a Williamette core Pentium 4 (1.6Ghz) system. I've tried both speex 1.1.5 release, and the current CVS (which self-IDs as 1.1.4), and the result is the same. I suspect some funk in the use of the SSE intrinsics macros. Backtrace: #0 0x40024594 in filter_mem2_10 (x=0x805f31c, _num=0x8061fb8, _den=0x8061fe4,
2004 Aug 06
2
Notes on 1.1.4 Windows. Testing of SSE Intrinics Code and others
Here are our notes on 1.1.4 testing on Windows 1. Compile Error with regular mode (FIXED_POINT undefined) at lsp.c line 104 static inline spx_word16_t spx_cos(spx_word16_t x) . VS6 does not like the inline keyword here. Removing it allows compiling. same with cb_search_sse.h line 34. 2. Compile Error with quant_lsp.c line 55. M_PI is undefined. Either it needs to be included
2004 Aug 06
3
[PATCH] Make SSE Run Time option.
Le jeu 15/01/2004 à 15:30, Daniel Vogel a écrit : > Unrelated, but please use SSE/MMX/... intrinsics on Windows instead of using > inline assembly so you also get the speed benefit on Win64. OK, so here's a first start. I've translated to intrinsics the asm I sent 1-2 days ago. The result is about 5% slower than the pure asm approach, so it's not too bad (SSE asm is 2x faster
2004 Aug 06
0
Coredumps when --enable-sse is selected
Hi, I've tried the same configure options on my system and it doesn't crash. I have the same glibc and gcc 3.3.2 (can you see if a newer gcc works?). Also, could you explore a bit with different options so we can narrow it down a bit. For example, does it work with the default CFLAGS or without --vbr or --dtx. Last thing, maybe it's the file. If so, please send me the smallest sample
2004 Aug 06
2
[PATCH] Make SSE Run Time option. Add Win32 SSE code
All, Attached is a patch that does two things. First it makes the use of the current SSE code a run time option through the use of speex_decoder_ctl() and speex_encoder_ctl It does this twofold. First there is a modification to the configure.in script which introduces a check based upon platform. It will compile in the sse assembly if you are on an i?86 based platform by making a
2004 Aug 06
2
[PATCH] Make SSE Run Time option. Add Win32 SSE code
Jean-Marc, >I'm still not sure I get it. On an Athlon XP, I can do something like >"mulps xmm0, xmm1", which means that the xmm registers are indeed >supported. Besides, without the xmm registers, you can't use much of >SSE. In the Atholon XP 2400+ that we have in our QA lab (Win2000 ) if you run that code it generates an Illegal Instruction Error. In addition,
2004 Aug 06
0
Notes on 1.1.4 Windows. Testing of SSE Intrinics Code and others
> 1. Compile Error with regular mode (FIXED_POINT undefined) at lsp.c line 104 > static inline spx_word16_t spx_cos(spx_word16_t x) . VS6 does not like > the inline keyword here. Removing it allows compiling. > > same with cb_search_sse.h line 34. It seems like your compiler simply doesn't like "inline". I suggest doing a -Dinline= which is what autoconf
2004 Aug 06
5
[PATCH] Make SSE Run Time option.
> Personally, I don't think much of PNI. The complex arithmetic stuff they > added sets you up for a lot of permute overhead that is inefficient -- > especially on a processor that is already weak on permute. In my opinion, Actually, the new instructions make it possible to do complex multiplies without the need to permute and separate the add and subtract. The really useful
2004 Aug 06
2
Notes on 1.1.4 Windows. Testing of SSE Intrinics Code and others
Jean-Marc, Good catch on the debug mode. After compiling the same code in release mode it does appear to be using all the registers correctly. Give us a few days to integrate our run-time flags into 1.1.4 and I will let you know how are testing turns out. Aron Rosenberg SightSpeed At 08:54 PM 1/21/2004, you wrote: > > 1. Compile Error with regular mode (FIXED_POINT undefined)
2005 Sep 29
3
centos 4 installed on P4 won't boot on P3
Hi, I installed centos 4 on a P4, configured it (and it booted fine here) then sent it to the DC to be put in a P3 but it won't boot, displays GRUB and halts. The DC guys tried grub-install in rescue mode but still the same. Any clues? Is there some difference between P3 and P4? thanks tom
2004 Aug 06
2
[PATCH] Make SSE Run Time option. Add Win32 SSE code
Jean-Marc, There is a big difference between SSE and SSEFP. The SSEFP means that the CPU supports the xmm registers. All Intel chips with SSE support do, however no current 32 bit AMD chips support the XMM registers. They will support the SSE instructions but not those registers. You are right about the SSE2 not being used. The AMD Opterons are the first AMD CPU's which support
2015 Feb 11
0
[PATCH v2 6/6] instmem/gk20a: add IOMMU support
Let GK20A's instmem take advantage of the IOMMU if it is present. Having an IOMMU means that instmem is no longer allocated using the DMA API, but instead obtained through page_alloc and made contiguous to the GPU by IOMMU mappings. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/nvkm/subdev/instmem/gk20a.c | 272 ++++++++++++++++++++++++++++---- 1 file
2008 Jul 22
3
6.3-RELEASE-p3 recurring panics on multiple SM PDSMi+
We have 10 SuperMicro PDSMi+ 5015M-MTs that are panic'ing every few days. This started shortly after upgrade from 6.2-RELEASE to 6.3-RELEASE with freebsd-update. Other than switching to a debugging kernel, a little sysctl tuning, and patching with freebsd-update, they are stock. The debugging kernel was built from source that is also being patched with freebsd-update. These systems are
2013 Feb 21
2
[PATCH] xen: consolidate implementations of LOG() macro
arm64 is going to add another one shortly, so take control now. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Cc: keir@xen.org Cc: jbeulich@suse.com Cc: tim@xen.org --- xen/arch/arm/arm32/asm-offsets.c | 8 +------- xen/arch/x86/x86_64/asm-offsets.c | 8 +------- xen/include/xen/bitops.h | 7 +++++++ 3 files changed, 9 insertions(+), 14 deletions(-) diff --git
2008 Aug 08
1
Freebsd 7.0-RELEASE-p3 panics
Hello, I've been having spurrious crash troubles with this box a while now and I haven't been able to figure out why. I've ran a couple memtest passes on it and it didn't pick up anything. Here's a backtrace I've been able to obtain. The kernel config is at the end. It's the generic kernel with ULE. I'm following chapter 11 of the developers' handbook, so if
2015 Feb 17
1
[PATCH v3 4/6] instmem/gk20a: use DMA attributes
On Tue, Feb 17, 2015 at 5:48 PM, Alexandre Courbot <acourbot at nvidia.com> wrote: > instmem for GK20A is allocated using dma_alloc_coherent(), which > provides us with a coherent CPU mapping that we never use because > instmem objects are accessed through PRAMIN. Switch to > dma_alloc_attrs() which gives us the option to dismiss that CPU mapping > and free up some CPU virtual
2015 Jan 23
0
[PATCH 4/6] instmem/gk20a: use DMA attributes
instmem for GK20A is allocated using dma_alloc_coherent(), which provides us with a coherent CPU mapping that we never use because instmem objects are accessed through PRAMIN. Switch to dma_alloc_attrs() which gives us the option to dismiss that CPU mapping and free up some CPU virtual space. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> ---
2015 Feb 17
0
[PATCH v3 4/6] instmem/gk20a: use DMA attributes
instmem for GK20A is allocated using dma_alloc_coherent(), which provides us with a coherent CPU mapping that we never use because instmem objects are accessed through PRAMIN. Switch to dma_alloc_attrs() which gives us the option to dismiss that CPU mapping and free up some CPU virtual space. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> ---