similar to: android tuning

Hi Jean-Marc, Thanks a lot for reviewing this huge assembly function! silk_warped_autocorrelation_FIX_c()'s kernel part is for( n = 0; n < length; n++ ) { tmp1_QS = silk_LSHIFT32( (opus_int32)input[ n ], QS ); /* Loop over allpass sections */ for( i = 0; i < order; i++ ) { /* Output of allpass section */ tmp2_QS = silk_SMLAWB(

This is a great idea. But the order (psEncC->shapingLPCOrder) can be configured to 12, 14, 16, 20 and 24 according to complexity parameter. It's hard to get a universal function to handle all these orders efficiently. Any suggestions? Thanks, Linfeng On Mon, Feb 6, 2017 at 12:40 PM, Jean-Marc Valin <jmvalin at jmvalin.ca> wrote: > Hi Linfeng, > > On 06/02/17 02:51 PM,

Hi Jean-Marc, Thanks for your suggestions. Will get back to you once we have some updates. Linfeng On Mon, Feb 6, 2017 at 5:47 PM, Jean-Marc Valin <jmvalin at jmvalin.ca> wrote: > Hi Linfeng, > > On 06/02/17 07:18 PM, Linfeng Zhang wrote: > > This is a great idea. But the order (psEncC->shapingLPCOrder) can be > > configured to 12, 14, 16, 20 and 24 according to

I attached a new patch with small cleanup (disassembly is identical as the last patch). We have done the same internal testing as usual. Also, attached 2 failed temporary versions which try to reduce code size (just for code review reference purpose). The new patch of silk_warped_autocorrelation_FIX_neon() has a code size of 3,228 bytes (with gcc). smaller_slower.c has a code size of 2,304

Thank Jean-Marc! The speedup percentages are all relative to the entire encoder. Comparing to master, this optimization patch speeds up fixed-point SILK encoder on NEON as following: Complexity 5: 6.1% Complexity 6: 5.8% Complexity 8: 5.5% Complexity 10: 4.0% when testing on an Acer Chromebook, ARMv7 Processor rev 3 (v7l), CPU max MHz: 2116.5 Thanks, Linfeng On Wed, Apr 5, 2017 at 11:02 AM,

The following dummy data frame has factor Q (with 2 levels) nesting factor P (with levels p1 and p2 nested under q1, and p3 and p4 nested under q2), but both crossing the random variate s, which has 8 levels. The dependent measure is dv. > # The data frame: > testnest dv s P Q 1 1 s1 p1 q1 2 2 s2 p1 q1 3 1 s3 p1 q1 4 2 s4 p1 q1 5 1 s5 p1 q1 6 3 s6 p1 q1 7 3 s7

Hello R-friends, i have a question to the "text"-function. a little test-dataset for better understanding: -the dataset was imported with read.table(....,header=TRUE) s1-s10 are the samplenames var1 var2 var3 s1 1 1 2 s2 2 3 1 s3 2 2 3 s4 5 4 3 s5 4 2 3 s6 6 3 2 s7 8 5 4 s8 7 2 1 s9 9 3 2

Hi, ABCRegister.td : def SGPR32 : RegisterClass<"ABC", [i32], 16, (add S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, S12, S13, S14, S15 )>; def SFGPR32 : RegisterClass<"ABC", [f32], 16, (add S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, S12, S13, S14, S15 )>; ===== Instruction selection ends: ... t8: i32 = ADDrr t37, t32

Thanks. This is making a lot more sense now and it's looking like this issue isn't Mips specific. Here's the IR dump before simple register coalescing (note: I've patched the IR printer to print the contents of the regmask): 4480B %vreg260<def> = LDC1 %vreg253, <cp#3>[TF=6]; mem:LD8[ConstantPool] AFGR64:%vreg260 GPR32:%vreg253 4496B %vreg261<def> = FMUL_D32

Hi R-users, I have a question relating to the HoltWinters() function. I am trying to forecast a series using the Holt Winters methodology but I am getting some unusual results. I had previously been using R for Windows version 2.7.2 and have just started using R 2.9.1. While using version 2.7.2 I was getting reasonable results however upon changing versions I found I started to see unusual

Hi, Attached is a patch with arm neon optimizations for silk_warped_autocorrelation_FIX(). Please review. Thanks, Felicia -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.xiph.org/pipermail/opus/attachments/20170131/9a912bb4/attachment-0001.html> -------------- next part -------------- A non-text attachment was scrubbed... Name:

Hi, all, We are working on a static analysis phase on LLVM's IR, we want to do a backforward phase through the use-def chain, I knew that LLVM had a built-in SSA form which provide the use-def chain for virtual register variables, however, I want to know if you also provide some kinds of use-def chain for memory operations? for example, I have the following source code int foo(int *q, int

On Dec 5, 2009, at 4:02 AM, Tianwei wrote: > Hi, all, > We are working on a static analysis phase on LLVM's IR, we want to do a backforward phase through the use-def chain, I knew that LLVM > had a built-in SSA form which provide the use-def chain for virtual register variables, however, I want to know if you also provide some kinds of use-def chain for memory operations? for

I have a multidimensional data which looks like the following: "S1-a" "S2-b" "S3-c" "S4-d" "S5-a" "S6-b" "S7-c" "S8-d" "T1-A" "T1-B" "T1-C" "T1-D" "T2-A" "T2-B" "T2-C" "T2-D" I read it from csv file and would like to have 16

I don't know if this is the best place to post this question but I will try anyway. I have two experiements for which I use one-way matched-randomized ANOVA for the analysis and I would like to compare different treatments in the two experiments. The only common group in the two experiments are the controls. Is there any ANOVA design that allows me to make this comparison taking into

Hi, I am trying to read the "credit.lisp" file of the Japanese credit database in UCI repository, but it is in lisp format which I do not know how to read. I have not found how to do that in the foreign library http://archive.ics.uci.edu/ml/datasets/Japanese+Credit+Screening <http://archive.ics.uci.edu/ml/datasets/Japanese+Credit+Screening> Could anyone help me? Best

Hi Linfeng, On 06/02/17 02:51 PM, Linfeng Zhang wrote: > However, the critical thing is that all the states in each stage when > processing input[i] are reused by the next input[i+1]. That is > input[i+1] must wait input[i] for 1 stage, and input[i+2] must wait > input[i+1] for 1 stage, etc. That is indeed the tricky part... and the one I think you could do slightly differently. If

Hi, I want to encode Loongson ISA initially https://gist.github.com/xiangzhai/8ae6966e2f02a94e180dd16ff1cd60ac gslbx           $2,0($3,$4) It is equivalent to: dadd $1, $3, $4 lb $2,0($1) I just use  mem_simmptr  as the default value of  DAGOperand MO , because  MipsMemAsmOperand  use  parseMemOperand  to parse general  MemOffset  and only *one*  AnyRegister , for example: 0($1) But 

Dear R-devel, We are pleased to inform you that the R Consortium OOP Working Group has been making progress on the S7 (formerly named R7) package and are preparing to submit it to CRAN. The S7 package is a new OOP system designed to be a successor to S3 and S4. As part of that effort, the group has identified a minimal set of narrow changes to base R that would allow S7 to exist as a CRAN

Hi Linfeng, On 06/02/17 07:18 PM, Linfeng Zhang wrote: > This is a great idea. But the order (psEncC->shapingLPCOrder) can be > configured to 12, 14, 16, 20 and 24 according to complexity parameter. > > It's hard to get a universal function to handle all these orders > efficiently. Any suggestions? I can think of two ways of handling larger orders. The obvious one is