similar to: CentOS automatic installation fails with “Installation Destination” error

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi all, I was testing oz/imagefactory on 32 bit arm, you have to have kernel-lpae installed to run kvm. while you can have the regular kernel installed also. You end up having the system booting the regular kernel and you do not get kvm. Ideally supermin will work with the lpae kernel.

Hello Guys, after hours of uncessfull create example before i forward special parition tests. part ignoe --onpart But Installation hang out for parition the harddisk. jump to another console partitions are ok ? Which line/lines is/are missing? Andy #version=DEVEL # System authorization information auth --enableshadow --passalgo=sha512 # Use CDROM installation media cdrom # Use graphical

Hello all, I've been struggling with an issue with my kickstart configuration for a while now. My kickstart files are stored within the initrd image. What I would like to do here, is when the kickstart first starts up, I want it to grab a DHCP address (it does at the moment) so it can grab all of the necessary installation data off the net. Then, at some point _IN_ the install process, I'd

Hi all, I've created an anaconda update.img file per instructions at https://fedoraproject.org/wiki/Anaconda/Updates for Centos 7.2. The problem is that the update.img file contains references to python3 (say, file /usr/sbin/anaconda), and so the all installation fails immediately. My question is: what are the steps to create an anaconda update image appropriate for a particular centos

Hi Sanjay, The behaviour I’m talking about I’ve actually pinned down to CodeGenPrepare not working too well with ISA’s that don’t have a good scaled load. I have a patch to fix it that is going through performance testing now. Your testcase seems specific to x86 – for aarch64 we get the rather spiffy: _Z3fooPii: // @_Z3fooPii // BB#0:

Dan, Thanks a lot. Using a modifier in the assembly string works for this case. I am trying to solve a related problem. I am trying to print out a set of "mov" ops for the vector_shuffle node. Since the source of the "mov" is from one of the sources to vector_shuffle, depending on the mask, I am not sure what assembly string to emit. For example, if I have d <-

I am seeing the following assertion in leak detector. /llvm/lib/VMCore/LeakDetector.cpp:43: void<unnamed>::LeakDetectorImpl<T>::addGarbage(const T*) [with T = void]: Assertion `Ts.count(Cache) == 0 && "Object already in set!"' failed. I am creating a list of instructions using BuildMI() and adding them to a basic block using BB->insert(). I am seeing this

HI James, Thanks for your reply and hints on what can be done for the Aarch64 backend optimization for llvm We have SPEC license and v8 hardware. So I will start looking into it warm regards Manjunath On Wed, Jun 25, 2014 at 8:42 PM, James Molloy <james.molloy at arm.com> wrote: > Hi Manjunath, > > At the time of writing that status we had only done our initial analysis. >

Manjunath, I had a very similar problem and I solved it using a custom vector shuffle and addition instead of mov. For example, Vector_shuffle s1, s2, <0,3> is mapped to a custom instruction where I transform the swizzle to a 32bit integer mask and an inverted mask. So I have dst, src0, src1, imm1, imm2 And I have my asm look similar to: Add dst, src0.imm1, src1.imm2 and then in the asm

Hello All, I am getting this error when I try to join my Win2K m/c to Samba, Windows cannot log you on because the profile cannot be loaded. Contact your network administrator. DETAIL - The system cannot find the file specified. I dont want Roaming profile to be implemented, I just want to give users local profiles only. When the client tries to logon to the PDC it looks for a profile to

Hi, It seems unlikely that the KCC is the cause of these issues. The KCC is only responsible for telling who to connect (and when) and doesn't actually affect any underlying network connectivity. Connectivity between the spokes should not be required and the communication between them is usually just some stale data. But none of that should affect either of these commands. Unless the DRS

On Wed, Jun 3, 2009 at 5:10 PM, Manjunath Kudlur <keveman at gmail.com> wrote: > I am seeing the following assertion in leak detector. > > /llvm/lib/VMCore/LeakDetector.cpp:43: > void<unnamed>::LeakDetectorImpl<T>::addGarbage(const T*) [with T = > void]: Assertion `Ts.count(Cache) == 0 && "Object already in set!"' > failed. > > I am

Hi Bill, I am using the following version of BuildMI : MachineInstrBuilder BuildMI(MachineFunction &MF, const TargetInstrDesc &TID, unsigned DestReg) I do the following : void createInstrs(std::vector<MachineInstr *>& ilist) { Machine Instr *mi; mi = BuildMI(MF, someTID, somereg);

I want to add a set of "properties" to each instruction in my instruction set, and want to be able to query that in my machine-specific optimizations. My Insts.td file looks as follows : class InstProperty; def propX : InstProperty; def propY : InstProperty; def propZ : InstProperty; class myInst<..., list<InstProperty> props> : Instruction { ... ...

Eric Christopher <echristo <at> gmail.com> writes: > > > The big pain issues I see merging from ARM64 to AArch64 are: > > 1. Apple have created a fairly complete scheduling model already for > > ARM64, and we'd have to merge the partial? model in AArch64 and theirs. We > > risk regressing performance on Apple's targets here, and we can't

Manjunath, I asked this question recently, but instead of telling you to search the archive I'm going to take it as a chance to recall how to do it (because I'll do so anyway and even telling tablegen to use an enum for instructions is not as trivial to do as you might think : ) I wrote it up in the wiki at http://wiki.llvm.org/HowTo:_Add_arbitrary_properties_to_instructions Regards,

Hello, I am trying to create a machine instruction for "extractelement". I want to translate r <- extractelement v, 0 to mov r, v.x I was looking at the dag I can use and I found vector_extract. The inputs for this SDnode are a register and a iPtr constant. With that, I need to create 4 separate def's to extract element 0, 1, 2, and 3 and translate to v.x, v.y, v.z, and v.w. I

Christian, Thanks for your reply and the wiki entry. I did search the archives, but evidently I didn't search for the right thing. My bad. Anyways, I am still wondering about the other part of my question. Why aren't there Tablegen backends specific to some architecture backends? Let me describe a different scenario. Suppose my architecture has vector and scalar units, and suppose I want

One way to do this is to handle this in the AsmPrinter, with operand modifiers. For example, on x86 there are instructions with ${dst:call} in their asm string. The "call" part is interpreted as an operand modifier. The assembly printer looks for the "call" modifier on MachineOperand::MO_Immediate operands (in X86ATTAsmPrinter::printOperand), which lets it perform custom

I believe that your issue is related to UNIX permissions. The location of your profiles directory must be set to allow all users R/W to it. Create a new group in your group file and add every user to it. Then change the ownership of the profiles directory. Also make sure that all of your users have R/W permissions on that directory. Regards, Robert Adkins II IT Manager/Buyer Impel