similar to: libvirt vs PCI virtio

On 12/20/18 9:20 AM, Daniel P. Berrangé wrote: > On Thu, Dec 20, 2018 at 03:15:34PM +0100, Riccardo Ravaioli wrote: >> Hi, >> >> My goal is to assign PCI addresses to a number of devices (network >> interfaces, disks and PCI devices in PCI-passthrough) without delegating to >> libvirt the generation of those values. This should give me more control >> and for

In include/sys/pci.h we have #define MAX_PCI_BUSES 255 and struct pci_bus_list { struct pci_bus pci_bus[MAX_PCI_BUSES]; uint8_t count; }; And in lib/pci/scan.c for (bus = 0; bus <= MAX_PCI_BUSES; bus++) { pci_bus_list->pci_bus[bus].pci_device_count = 0; Fix possible overflows and introduce MAX_PCI_FUNC. - Sebastian Index: syslinux-20080611/com32/lib/pci/scan.c

Hi, I saw that Xen support a translation between device/intx to GSI for a single PCI bus, I thought about adding multiple PCI bus support but disregard the bus information so the same device/intx on different buses will be OR wired to the same GSI, sounds reasonable? What other things do I need to support in Xen in order to add multiple PCI buses, assuming that secondary buses holds only

I am trying to create a QEMU MIPS guest, so that I can test some code for big-endian safety. Every attempt to create a MIPS guest is giving me an error: Unable to complete install: 'XML error: No PCI buses available' It seems like this is a known issue. https://www.redhat.com/archives/libvir-list/2016-May/msg00197.html However, I am still getting this on a fully updated Fedora

On Thu, Dec 20, 2018 at 03:15:34PM +0100, Riccardo Ravaioli wrote: > Hi, > > My goal is to assign PCI addresses to a number of devices (network > interfaces, disks and PCI devices in PCI-passthrough) without delegating to > libvirt the generation of those values. This should give me more control > and for sure more predictability over the hardware configuration of a > virtual

From: Jan Kiszka <jan.kiszka at siemens.com> PCI and PCIBIOS probing only scans devices at function number 0/8/16/... Subdevices (e.g. multiqueue) have function numbers which are not a multiple of 8. The simple hypervisor Jailhouse passes subdevices directly w/o providing a virtual PCI topology like KVM. As a consequence a PCI passthrough from Jailhouse to a guest will not be detected by

On Mon, Mar 13, 2017 at 04:23:38PM -0500, Ian Pilcher wrote: > I am trying to create a QEMU MIPS guest, so that I can test some code > for big-endian safety. You are probably better off using PPC64 which is big-endian and much more widely tested in libvirt than MIPS, so actually likely to work reliably. > Every attempt to create a MIPS guest is giving me an error: > > Unable to

Reserve bus range for SR-IOV at device scanning stage. Cc: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: Randy Dunlap <randy.dunlap at oracle.com> Cc: Grant Grundler <grundler at parisc-linux.org> Cc: Alex Chiang <achiang at hp.com> Cc: Matthew Wilcox <matthew at wil.cx> Cc: Roland Dreier <rdreier at cisco.com> Cc: Greg KH <greg at kroah.com>

Remove "(void)cfgtype;" from com32/lib/pci/scan.c. - Sebastian Index: syslinux-3.74-pre11-2-g4fc8259/com32/lib/pci/scan.c =================================================================== --- syslinux-3.74-pre11-2-g4fc8259.orig/com32/lib/pci/scan.c +++ syslinux-3.74-pre11-2-g4fc8259/com32/lib/pci/scan.c @@ -441,7 +441,6 @@ struct pci_domain *pci_scan(void) int cfgtype;

Hi Everyone, I am trying to setup xen3.4.1 FC12(xendom0) on top of FC12 freshly installed. I am using DQ965GF intel mother board having intel VT-x enabled. I have installed everything properly, but xen boot gets stuck at this point, xenbus_probe_init ok ACPI: bus type pci registered PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 255 PCI: Not using MMCONFIG. I did few googlings

Hi Everyone, I am trying to setup xen3.4.1 FC12(xendom0) on top of FC12 freshly installed. I am using DQ965GF intel mother board having intel VT-x enabled. I have installed everything properly, but xen boot gets stuck at this point, xenbus_probe_init ok ACPI: bus type pci registered PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 255 PCI: Not using MMCONFIG. I did few googlings

Samsung R&D Institute Russia is looking for a senior compiler engineer to work on LLVM based compiler for new Samsung GPU. *What you'll be doing:* - Design and develop target independent and processor specific optimizations - Work on compiler improvements and problem resolutions - Perform benchmarking and testing to improve quality of compiler - Review code changes and design proposals

Use new PCI interfaces to simplify xen-pcifront implementation: 1) Use pci_create_root_bus() instead of pci_scan_bus_parented() because pci_scan_bus_parented() is marked as __deprecated.This also gets rid of a duplicated call of pci_bus_start_devices(). 2) Use pci_stop_root_bus() and pci_remove_root_bus() instead of open-coded private implementation. 3) Use pci_set_host_bridge_release()

Use new PCI interfaces to simplify xen-pcifront implementation: 1) Use pci_create_root_bus() instead of pci_scan_bus_parented() because pci_scan_bus_parented() is marked as __deprecated.This also gets rid of a duplicated call of pci_bus_start_devices(). 2) Use pci_stop_root_bus() and pci_remove_root_bus() instead of open-coded private implementation. 3) Use pci_set_host_bridge_release()

Use new PCI interfaces to simplify xen-pcifront implementation: 1) Use pci_create_root_bus() instead of pci_scan_bus_parented() because pci_scan_bus_parented() is marked as __deprecated.This also gets rid of a duplicated call of pci_bus_start_devices(). 2) Use pci_stop_root_bus() and pci_remove_root_bus() instead of open-coded private implementation. 3) Use pci_set_host_bridge_release()

*** Proceedings published by Springer and indexed by ISI, Scopus, EI-Compendex, DBLP, etc. --------------------------------------------------------------------------------------------------- MOSITS?17 ? The 2017 International Conference on Information Technology Science Moscow, Russia, 01 ? 03 December 2017 https://www.mosits.org/

*** Proceedings published by Springer and indexed by ISI, Scopus, EI-Compendex, DBLP, etc. --------------------------------------------------------------------------------------------------- MOSITS?17 ? The 2017 International Conference on Information Technology Science Moscow, Russia, 01 ? 03 December 2017 https://www.mosits.org/

Hi, Does such card exist ? It seems all existing models are designed for PCI buses. Regards -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.digium.com/pipermail/asterisk-users/attachments/20080201/b449b98e/attachment.htm

Hello List, The main issue is server selection regarding PCI bus connectivity for Asterisk solutions. Most offerings on HP Proliants, something I've been looking into, include PCI-X and/or PCI-e expansion slots. I know PCI-e is totally different from PCI and PCI-X so, for now, that's not an issue. However, regarding PCI and PCI-X, and after googling for a while and checking wikipedia

Package: src:xen Version: 4.14.1+11-gb0b734a8b3-1 Severity: critical Justification: causes serious data loss X-Debbugs-Cc: debianbts at virtualzone.hu Dear Maintainer, after a clean install of bullseye/testing the xen dmesg shows the following message: (XEN) AMD-Vi: IO_PAGE_FAULT: 0000:01:00.1 d0 addr fffffffdf8000000 flags 0x8 I this is the sata device: 01:00.1 SATA controller: Advanced Micro