similar to: [PATCH 0/6] jailhouse: Enhance secondary Jailhouse guest support /wrt PCI

Basic x86 support [1] for running Linux as secondary Jailhouse [2] guest is currently pending in the tip tree. This builds on top and enhances the PCI support for x86 and also ARM guests (ARM[64] does not require platform patches and works already). Key elements of this series are: - detection of Jailhouse via device tree hypervisor node - function-level PCI scan if Jailhouse is detected -

Basic x86 support [1] for running Linux as secondary Jailhouse [2] guest is currently pending in the tip tree. This builds on top and enhances the PCI support for x86 and also ARM guests (ARM[64] does not require platform patches and works already). Key elements of this series are: - detection of Jailhouse via device tree hypervisor node - function-level PCI scan if Jailhouse is detected -

Basic x86 support [1] for running Linux as secondary Jailhouse [2] guest is currently pending in the tip tree. This builds on top and enhances the PCI support for x86 and also ARM guests (ARM[64] does not require platform patches and works already). Key elements of this series are: - detection of Jailhouse via device tree hypervisor node - function-level PCI scan if Jailhouse is detected -

Basic x86 support [1] for running Linux as secondary Jailhouse [2] guest is currently pending in the tip tree. This builds on top and enhances the PCI support for x86 and also ARM guests (ARM[64] does not require platform patches and works already). Key elements of this series are: - detection of Jailhouse via device tree hypervisor node - function-level PCI scan if Jailhouse is detected -

Basic x86 support [1] for running Linux as secondary Jailhouse [2] guest is currently pending in the tip tree. This builds on top and enhances the PCI support for x86 and also ARM guests (ARM[64] does not require platform patches and works already). Key elements of this series are: - detection of Jailhouse via device tree hypervisor node - function-level PCI scan if Jailhouse is detected -

From: Otavio Pontes <otavio.pontes at intel.com> Use the PCI mmconfig base address exported by jailhouse in boot parameters in order to access the memory mapped PCI configuration space. Signed-off-by: Otavio Pontes <otavio.pontes at intel.com> [Jan: rebased, fixed !CONFIG_PCI_MMCONFIG] Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com> --- arch/x86/include/asm/pci_x86.h | 2

From: Otavio Pontes <otavio.pontes at intel.com> Use the PCI mmconfig base address exported by jailhouse in boot parameters in order to access the memory mapped PCI configuration space. Signed-off-by: Otavio Pontes <otavio.pontes at intel.com> [Jan: rebased, fixed !CONFIG_PCI_MMCONFIG] Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com> --- arch/x86/include/asm/pci_x86.h | 2

From: Otavio Pontes <otavio.pontes at intel.com> Use the PCI mmconfig base address exported by jailhouse in boot parameters in order to access the memory mapped PCI configuration space. Signed-off-by: Otavio Pontes <otavio.pontes at intel.com> [Jan: rebased, fixed !CONFIG_PCI_MMCONFIG] Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com> --- arch/x86/include/asm/pci_x86.h | 2

From: Otavio Pontes <otavio.pontes at intel.com> Use the PCI mmconfig base address exported by jailhouse in boot parameters in order to access the memory mapped PCI configuration space. Signed-off-by: Otavio Pontes <otavio.pontes at intel.com> [Jan: rebased, fixed !CONFIG_PCI_MMCONFIG, used pcibios_last_bus] Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com> ---

On Wed, 28 Feb 2018, Jan Kiszka wrote: > From: Jan Kiszka <jan.kiszka at siemens.com> > > Per PCIe r4.0, sec 7.5.1.1.9, multi-function devices are required to > have a function 0. Therefore, Linux scans for devices at function 0 > (devfn 0/8/16/...) and only scans for other functions if function 0 > has its Multi-Function Device bit set or ARI or SR-IOV indicate >

On Mon, Jan 22, 2018 at 8:12 AM, Jan Kiszka <jan.kiszka at siemens.com> wrote: > #include <linux/export.h> > #include <linux/pci.h> > #include <asm/pci_x86.h> > +#include <asm/jailhouse_para.h> Keep it in order? > #include <linux/acpi.h> > #include <linux/irqdomain.h> > #include <linux/pm_runtime.h> > +#include

On Mon, Jan 22, 2018 at 8:12 AM, Jan Kiszka <jan.kiszka at siemens.com> wrote: > #include <linux/export.h> > #include <linux/pci.h> > #include <asm/pci_x86.h> > +#include <asm/jailhouse_para.h> Keep it in order? > #include <linux/acpi.h> > #include <linux/irqdomain.h> > #include <linux/pm_runtime.h> > +#include

From: Jan Kiszka <jan.kiszka at siemens.com> PCI and PCIBIOS probing only scans devices at function number 0/8/16/... Subdevices (e.g. multiqueue) have function numbers which are not a multiple of 8. The simple hypervisor Jailhouse passes subdevices directly w/o providing a virtual PCI topology like KVM. As a consequence a PCI passthrough from Jailhouse to a guest will not be detected by

On Thu, Mar 1, 2018 at 7:40 AM, Jan Kiszka <jan.kiszka at siemens.com> wrote: > Use the PCI mmconfig base address exported by jailhouse in boot > parameters in order to access the memory mapped PCI configuration space. > --- a/arch/x86/kernel/jailhouse.c > +++ b/arch/x86/kernel/jailhouse.c > @@ -124,6 +124,13 @@ static int __init jailhouse_pci_arch_init(void) >

From: Jan Kiszka <jan.kiszka at siemens.com> Per PCIe r4.0, sec 7.5.1.1.9, multi-function devices are required to have a function 0. Therefore, Linux scans for devices at function 0 (devfn 0/8/16/...) and only scans for other functions if function 0 has its Multi-Function Device bit set or ARI or SR-IOV indicate there are more functions. The Jailhouse hypervisor may pass individual

From: Jan Kiszka <jan.kiszka at siemens.com> Per PCIe r4.0, sec 7.5.1.1.9, multi-function devices are required to have a function 0. Therefore, Linux scans for devices at function 0 (devfn 0/8/16/...) and only scans for other functions if function 0 has its Multi-Function Device bit set or ARI or SR-IOV indicate there are more functions. The Jailhouse hypervisor may pass individual

From: Jan Kiszka <jan.kiszka at siemens.com> Per PCIe r4.0, sec 7.5.1.1.9, multi-function devices are required to have a function 0. Therefore, Linux scans for devices at function 0 (devfn 0/8/16/...) and only scans for other functions if function 0 has its Multi-Function Device bit set or ARI or SR-IOV indicate there are more functions. The Jailhouse hypervisor may pass individual

From: Jan Kiszka <jan.kiszka at siemens.com> Per PCIe r4.0, sec 7.5.1.1.9, multi-function devices are required to have a function 0. Therefore, Linux scans for devices at function 0 (devfn 0/8/16/...) and only scans for other functions if function 0 has its Multi-Function Device bit set or ARI or SR-IOV indicate there are more functions. The Jailhouse hypervisor may pass individual

On 2018-02-22 21:57, Bjorn Helgaas wrote: > On Mon, Jan 22, 2018 at 07:12:46AM +0100, Jan Kiszka wrote: >> From: Jan Kiszka <jan.kiszka at siemens.com> >> >> PCI and PCIBIOS probing only scans devices at function number 0/8/16/... >> Subdevices (e.g. multiqueue) have function numbers which are not a >> multiple of 8. > > Suggested text: > >

From: Jan Kiszka <jan.kiszka at siemens.com> Implement jailhouse_paravirt() via device tree probing on architectures != x86. Will be used by the PCI core. CC: Rob Herring <robh+dt at kernel.org> CC: Mark Rutland <mark.rutland at arm.com> Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com> --- Documentation/devicetree/bindings/jailhouse.txt | 8 ++++++++