similar to: locking/pvqspinlock, x86: undefined CONFIG_QUEUED_SPINLOCKS

This patch adds para-virtualization support to the queue spinlock code by enabling the queue head to kick the lock holder CPU, if known, in when the lock isn't released for a certain amount of time. It also enables the mutual monitoring of the queue head CPU and the following node CPU in the queue to make sure that their CPUs will stay scheduled in. Signed-off-by: Waiman Long <Waiman.Long

This patch adds para-virtualization support to the queue spinlock in the same way as was done in the PV ticket lock code. In essence, the lock waiters will spin for a specified number of times (QSPIN_THRESHOLD = 2^14) and then halted itself. The queue head waiter will spins 2*QSPIN_THRESHOLD times before halting itself. When it has spinned QSPIN_THRESHOLD times, the queue head will assume that the

This patch adds base para-virtualization support to the queue spinlock in the same way as was done in the PV ticket lock code. In essence, the lock waiters will spin for a specified number of times (QSPIN_THRESHOLD = 2^14) and then halted itself. The queue head waiter, unlike the other waiter, will spins 2*QSPIN_THRESHOLD times before halting itself. Before being halted, the queue head waiter

On 10/24/2014 06:04 PM, Peter Zijlstra wrote: > On Fri, Oct 24, 2014 at 04:53:27PM -0400, Waiman Long wrote: >> The additional register pressure may just cause a few more register moves >> which should be negligible in the overall performance . The additional >> icache pressure, however, may have some impact on performance. I was trying >> to balance the performance of

On 10/24/2014 06:04 PM, Peter Zijlstra wrote: > On Fri, Oct 24, 2014 at 04:53:27PM -0400, Waiman Long wrote: >> The additional register pressure may just cause a few more register moves >> which should be negligible in the overall performance . The additional >> icache pressure, however, may have some impact on performance. I was trying >> to balance the performance of

On 10/27/2014 05:22 PM, Waiman Long wrote: > On 10/27/2014 02:04 PM, Peter Zijlstra wrote: >> On Mon, Oct 27, 2014 at 01:38:20PM -0400, Waiman Long wrote: >>> On 10/24/2014 04:54 AM, Peter Zijlstra wrote: >>>> On Thu, Oct 16, 2014 at 02:10:38PM -0400, Waiman Long wrote: >>>> >>>>> Since enabling paravirt spinlock will disable unlock function

This patch adds para-virtualization support to the queue spinlock code base with minimal impact to the native case. There are some minor code changes in the generic qspinlock.c file which should be usable in other architectures. The other code changes are specific to x86 processors and so are all put under the arch/x86 directory. On the lock side, there are a couple of jump labels and 2 paravirt

This patch adds para-virtualization support to the queue spinlock code base with minimal impact to the native case. There are some minor code changes in the generic qspinlock.c file which should be usable in other architectures. The other code changes are specific to x86 processors and so are all put under the arch/x86 directory. On the lock side, there are a couple of jump labels and 2 paravirt

On Wed, Oct 29, 2014 at 04:19:09PM -0400, Waiman Long wrote: > arch/x86/include/asm/pvqspinlock.h | 411 +++++++++++++++++++++++++++++++++ I do wonder why all this needs to live in x86.. > > +#ifdef CONFIG_QUEUE_SPINLOCK > + > +static __always_inline void pv_kick_cpu(int cpu) > +{ > + PVOP_VCALLEE1(pv_lock_ops.kick_cpu, cpu); > +} > + > +static __always_inline

This patch adds para-virtualization support to the queue spinlock code base with minimal impact to the native case. There are some minor code changes in the generic qspinlock.c file which should be usable in other architectures. The other code changes are specific to x86 processors and so are all put under the arch/x86 directory. On the lock side, the slowpath code is split into 2 separate

This patch adds para-virtualization support to the queue spinlock code base with minimal impact to the native case. There are some minor code changes in the generic qspinlock.c file which should be usable in other architectures. The other code changes are specific to x86 processors and so are all put under the arch/x86 directory. On the lock side, the slowpath code is split into 2 separate

From: Pan Xinhui <xinhui.pan at linux.vnet.ibm.com> This patch aims to enable qspinlock on PPC. And on pseries platform, it also support paravirt qspinlock. Signed-off-by: Pan Xinhui <xinhui.pan at linux.vnet.ibm.com> --- arch/powerpc/include/asm/qspinlock.h | 37 +++++++++++++++ arch/powerpc/include/asm/qspinlock_paravirt.h | 36 +++++++++++++++

From: Pan Xinhui <xinhui.pan at linux.vnet.ibm.com> This patch aims to enable qspinlock on PPC. And on pseries platform, it also support paravirt qspinlock. Signed-off-by: Pan Xinhui <xinhui.pan at linux.vnet.ibm.com> --- arch/powerpc/include/asm/qspinlock.h | 37 +++++++++++++++ arch/powerpc/include/asm/qspinlock_paravirt.h | 36 +++++++++++++++

From: Pan Xinhui <xinhui.pan at linux.vnet.ibm.com> This path aims to enable qspinlock on PPC. And on pseries platform, it also support paravirt qspinlock. Signed-off-by: Pan Xinhui <xinhui.pan at linux.vnet.ibm.com> --- arch/powerpc/include/asm/qspinlock.h | 37 +++++++++++++++ arch/powerpc/include/asm/qspinlock_paravirt.h | 36 +++++++++++++++

From: Pan Xinhui <xinhui.pan at linux.vnet.ibm.com> This path aims to enable qspinlock on PPC. And on pseries platform, it also support paravirt qspinlock. Signed-off-by: Pan Xinhui <xinhui.pan at linux.vnet.ibm.com> --- arch/powerpc/include/asm/qspinlock.h | 37 +++++++++++++++ arch/powerpc/include/asm/qspinlock_paravirt.h | 36 +++++++++++++++

On 06/12/2014 04:17 AM, Peter Zijlstra wrote: > On Fri, May 30, 2014 at 11:44:00AM -0400, Waiman Long wrote: >> @@ -19,13 +19,46 @@ extern struct static_key virt_unfairlocks_enabled; >> * that the clearing the lock bit is done ASAP without artificial delay >> * due to compiler optimization. >> */ >> +#ifdef CONFIG_PARAVIRT_SPINLOCKS >> +static

I changed it to the below; I've not gotten around to compiling or even running it yet :-( The biggest change is the pv_hash/pv_unhash functions, which I've rewritten to hopefully be clearer (and also hopefully not wrecked them). I took out the cacheline sized structure which takes out that double loop and simplifies things. I've also added some comments which hopefully explain how/why

I changed it to the below; I've not gotten around to compiling or even running it yet :-( The biggest change is the pv_hash/pv_unhash functions, which I've rewritten to hopefully be clearer (and also hopefully not wrecked them). I took out the cacheline sized structure which takes out that double loop and simplifies things. I've also added some comments which hopefully explain how/why

On Fri, May 30, 2014 at 11:44:00AM -0400, Waiman Long wrote: > @@ -19,13 +19,46 @@ extern struct static_key virt_unfairlocks_enabled; > * that the clearing the lock bit is done ASAP without artificial delay > * due to compiler optimization. > */ > +#ifdef CONFIG_PARAVIRT_SPINLOCKS > +static __always_inline void __queue_spin_unlock(struct qspinlock *lock) > +#else >

On Fri, May 30, 2014 at 11:44:00AM -0400, Waiman Long wrote: > @@ -19,13 +19,46 @@ extern struct static_key virt_unfairlocks_enabled; > * that the clearing the lock bit is done ASAP without artificial delay > * due to compiler optimization. > */ > +#ifdef CONFIG_PARAVIRT_SPINLOCKS > +static __always_inline void __queue_spin_unlock(struct qspinlock *lock) > +#else >