similar to: [klibc:master] Fix sparc assembly when compiled as PIC

Some distributions default to PIE for their compilers, which on sparc is passed on to the assembler. Since the behaviour of %hi/%lo changes under PIC to become GOT offsets, the current assembly files need adapting to not try to use a GOT offset as an absolute address. --- usr/include/arch/sparc/machine/asm.h | 15 +++++++++++++-- usr/include/arch/sparc64/machine/asm.h | 1 +

Hello! Can someone please help me in building debug version of klibc ? I've cloned git://git.kernel.org/pub/scm/libs/klibc/klibc.git , but failed to build it with debug info added "-g" to HOSTCFLAGS in Makefile, but $ make -j KLIBCKERNELSRC=`pwd`/../linux-2.6/usr still strips every debug symbol , and i'm failed to change scripts/Kbuild.klibc and Makefile to remove strip

The parts of klibc specific to the sparc64 architecture. Signed-off-by: H. Peter Anvin <hpa at zytor.com> --- commit f30fa3db62972125afa68d3b53d03cdb843d3bbd tree f2d942e281dce8bb98d4fa84b7e431c7beaddfc4 parent 1b5c93603ed3460ed1fba9e5d453a6fa54d0ccce author H. Peter Anvin <hpa at zytor.com> Sun, 25 Jun 2006 16:58:50 -0700 committer H. Peter Anvin <hpa at zytor.com> Sun, 25 Jun

The parts of klibc specific to the sparc architecture. Signed-off-by: H. Peter Anvin <hpa at zytor.com> --- commit 1b5c93603ed3460ed1fba9e5d453a6fa54d0ccce tree 7fb0a134b3add408c02b470616d440ad398d86d3 parent 94473ed85b00ec45ff8ee6cac62f60a368ff4534 author H. Peter Anvin <hpa at zytor.com> Sun, 25 Jun 2006 16:58:47 -0700 committer H. Peter Anvin <hpa at zytor.com> Sun, 25 Jun

Ah, Mondays. The following oops happened after approximately eleven days of uptime. The machine was not under any particular load at the time. Following a forced reboot, all filesystems replayed the journal successfully. Relevant log entries leading up to the oops: Nov 4 04:54:08 localhost kernel: attempt to access beyond end of device Nov 4 04:54:08 localhost kernel: 03:02: rw=1,

Commit-ID: 77c7ccc993d605eb7f6bef511017d28c1bb2d7e7 Gitweb: http://git.kernel.org/?p=libs/klibc/klibc.git;a=commit;h=77c7ccc993d605eb7f6bef511017d28c1bb2d7e7 Author: Ben Hutchings <ben at decadent.org.uk> AuthorDate: Fri, 28 Aug 2020 19:21:47 +0100 Committer: Ben Hutchings <ben at decadent.org.uk> CommitDate: Fri, 28 Aug 2020 19:52:24 +0100 [klibc] signal: Move

Hello, make check on Solaris 10 throws a segmentation fault. The error is independent of the compiler (SunStudio/GCC) and processor architecture (SPARC/x86) and 32 or 64 bit binary. Dovecot Version: 2.2.10 OS: Solaris 10/SPARC & x86 SunStudion Compiler cc: Sun C 5.10 SunOS_sparc Patch 141861-10 2012/11/07 GCC gcc version 3.4.3 (csl-sol210-3_4-branch+sol_rpath) The error occurs first

tried below fix, that is a partial revert of klibc 6fbd8fafdcc793135988733996d72b0298afe934 see git://git.kernel.org/pub/scm/libs/klibc/klibc.git with belows fix klibc compiles fine on sparc with newer gcc, but segfaults: titan:~# strace -vfF /usr/lib/klibc/bin/fstype execve("/usr/lib/klibc/bin/fstype", ["/usr/lib/klibc/bin/fstype"], ["SHELL=/bin/bash",

The following changes since commit 4d19974d7020488f63651244e1f9f51727c3f66c: [klibc] fwrite: fix typo in comment (2016-02-01 13:26:01 -0800) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/bwh/klibc.git for-hpa for you to fetch changes up to 7b49d9729ff6b3118c57eb6fe52c4f186016cfa0: [klibc] x86_64: Use -Ttext-segment to avoid address collision

I have updated the klibc patchset based on feedback received. In particular, the patchset has been reorganized so as not to break git-bisect. Additionally, this updates the patch base to 2.6.17-git12 (d38b69689c349f35502b92e20dafb30c62d49d63) and klibc 1.4.8; the main difference on the klibc side is removal of obsolete code. This is also available as a git tree at:

Hi, I have the following test code print.c: #include <stdio.h> int main(){ fprintf(stderr, "Error!\n"); return 0; } I did the following on linux to cross-compile it for Sparc architecture: clang -m32 -c print.c -emit-llvm -o print.bc (or llvm-gcc -m32 -c print.c -emit-llvm -o print.bc) llvm-dis < print.bc -o print2.bc llc -march=sparc -mcpu=v8 print2.bc -o print_s.s if

For my case, I can't replace these call instructions with inline assembly code because I need to encode the registers into the "number". For instance, if the call instruction is %result = call i32 @foo(i32 %a) and the result is assigned to register %l0 and the variable "a" to register %l1, then I encode all foo, %l0 and %l1 and generate a sethi instruction. thanks,

I have similar requirements for my project. This is what I do. 1. Add a new intrinsic function to LLVM that corresponds to "functions with particular type of function names". The steps to create intrinsic function is documented in http://llvm.org/docs/ExtendingLLVM.html#intrinsic. 2. Create a lowering pass that lowers "functions with particular type" ( eg. p0, p1) to

On Jan 7, 2011, at 2:36 PM, Venkatraman Govindaraju wrote: > When I run LLC with option "-O0 -march=sparc" on following testcase, > fast register allocator crashes with "UNREACHABLE executed" error. LLC > generates code successfully with other standard register allocators > available. I haven't investigated the Sparc backend specifically but... My guess is

Hi, There are some generated Sparc assembly code like this: main: ! @main ! BB#0: save %sp, -112, %sp sethi 0, %l0 or %g0, 5, %l1 st %l0, [%fp+-4] st %l1, [%fp+-8] st %l1, [%fp+-12] sethi %hi(.L.str), %l1 ld [%fp+-8], %o1 add %l1, %lo(.L.str), %l1 or %g0, %l1, %o0 call printf nop ld [%fp+-12], %o2 ld [%fp+-8], %l2 sethi %hi(.L.strQ521), %l3 add

On 1/20/11 12:27 PM, Venkatraman Govindaraju wrote: Just out of curiosity, have either of you considered writing an LLVM transform that simply replaces these call instructions with inline assembly code that does what you want? If that works, it seems much simpler than modifying/enhancing the code generator. -- John T. > I have similar requirements for my project. This is what I do. >

Hello all, I am trying to modify the Sparc backend to do something for my team's project, to do the following. Whenever the backend encounters a call to one particular type of function names (functions like p0(), p1()..etc), I want the backend to generate a "sethi %g0, <number>", and NOT a "call p0, call p1..." instruction. However, the backend should work as usual

Hello guys, I'm writing a pass that must check every machine instruction that will go to assembly. I've put my pass registration just before the "addAsmEmmiter" line in LLVMTargetMachine.cpp But, iterating trought machine functions and basic blocks inside the functions, there are still machine instructions that I cant reach. This is the beginnig of the asm output of my example

Hello. I have been trying to check, how llvm works on Solaris recently. First I have tested lli, whitch seems to execute the bytecode generated on Linux without any problems. However, llc has failed to generate valid SPARC assembler code even on the helloworld example. Here is the generated code: sakharov at trillian:~$ cat ./test.s .text .align 16 .globl main

Hi, I recently tried to get Samba 3.0.21a running on Solaris 9 several times, using different build environments. The compilers in use where Sun Forte Version 11 and gcc 3.4.2. The binaries where compiled for 64 bit, using CFLAGS="-m64" for gcc for example. I just used configure --prefix=<path> The core file analysis of the latest build shows that strlen() is called: # mdb core