similar to: [ANNOUNCE] libdrm 2.4.102

v2: Fix build against Xservers without Wayland support Don't try to acquire/drop drm master under Wayland Refresh for xserver 1.13 kill-all-direct-access-to-xf86Screens Remove #ifdef soup in favour of xwayland compat header Signed-off-by: Christopher James Halse Rogers <christopher.halse.rogers at canonical.com> --- configure.ac | 7 ++ src/Makefile.am |

Signed-off-by: Christopher James Halse Rogers <christopher.halse.rogers at canonical.com> --- This is mostly just for testing, although it should be safe to apply to nouveau trunk. src/nouveau_dri2.c | 34 +++++++++++ src/nv_driver.c | 163 +++++++++++++++++++++++++++++++++++++++++++++++----- src/nv_type.h | 7 +++ 3 files changed, 191 insertions(+), 13 deletions(-) diff

Chia-I Wu (1): modetest: print modifiers in hex as well Dmitry Baryshkov (1): modetest: custom mode support Dylan Baker (3): meson: fix intel requirements meson: Use feature.require() and feature.allowed() meson: replace deprecated program.path -> program.full_path Ezequiel Garcia (1): modetest: avoid erroring if there's no gamma legacy support Geert

Alex Deucher (2): radeon: add some missing evergreen pci ids radeon: add some new SI pci ids Chris Wilson (1): intel: Bail gracefully if we encounter an unknown Intel device Cooper Yuan (1): libdrm/exynos: padding gem_mmap structure to 64-bit aligned Damien Lespiau (1): intel: Remove two unused variables Dave Airlie (4): libdrm: add missing caps from kernel

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Release to fix regression in nouveau in 2.4.60, but brings lots of android changes and other fixes. Ben Skeggs (2): nouveau: restore check that avoids multiple user bos per kernel bo configure.ac: bump version to 2.4.61 for release Chih-Wei Huang (3): android: simplify the including rule of subdirs android: get rid of

David Jagu (1): meson: fix typo in libdrm_intel Geert Uytterhoeven (18): util: improve SMPTE color LUT accuracy util: factor out and optimize C8 SMPTE color LUT util: add support for DRM_FORMAT_C[124] util: store number of colors for indexed formats util: add SMPTE pattern support for C4 format util: add SMPTE pattern support for C1 format util: add

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Adam Cheney (1): Add new DRM_MODE_CONNECTOR and _ENCODER defines Chris Wilson (1): intel: Avoid overcounting fences when emitting self-referential relocs Damien Lespiau (3): intel/skl: Add SKL PCI ids intel/skl: Add gen9 to the buffer manager init intel/skl: add gen9 to the CS decoding init Dave Airlie (1):

This release introduces the atomic and blob APIs, adds support for new devices (AMD Bonaire) and a new flag for coherent BOs in nouveau. Alex Deucher (1): radeon: add new bonaire pci id Alexandre Courbot (1): nouveau: add coherent BO attribute Boris BREZILLON (2): modetest: add atmel-hlcdc driver support tests/kmstest: support atmel-hlcdc Damien Lespiau (1):

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA512 Adrian Salido (1): libdrm: reduce number of reallocations in drmModeAtomicAddProperty Chunming Zhou (9): add cs chunk for syncobj timeline add timeline wait/query ioctl v2 wrap syncobj timeline query/wait APIs for amdgpu v3 add timeline signal/transfer ioctls v2 expose timeline signal/export/import interfaces v2

On Wed, Jul 3, 2013 at 9:55 AM, Laurent Pinchart <laurent.pinchart at ideasonboard.com> wrote: > Hi Dave, > > On Tuesday 02 July 2013 18:22:01 Dave Airlie wrote: >> -----BEGIN PGP SIGNED MESSAGE----- >> Hash: SHA1 >> >> Release because I want the cursor ioctls released, >> also haswell and radeon ids. > > Any chance to get the "[PATCH v6

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Daniel Kurtz (1): modetest: add mediatek to module list Eric Anholt (1): Simplify the RELEASING steps based on current release.sh. Flora Cui (1): amdgpu: expose the AMDGPU_GEM_CREATE_VRAM_CLEARED flag Kristian H. Kristensen (1): Add drmModeAddFB2WithModifiers() which takes format modifiers Leo Liu (1):

On Fri, Nov 17, 2017 at 2:37 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: > On Fri, Nov 17, 2017 at 2:25 PM, Ondrej Zary <linux at rainbow-software.org> wrote: >> On Friday 17 November 2017 18:41:17 Ilia Mirkin wrote: >>> On Fri, Nov 17, 2017 at 12:33 PM, Ondrej Zary >>> >>> <linux at rainbow-software.org> wrote: >>> > @@ -483,8

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Alan Coopersmith (1): Include <alloca.h> when needed before calling alloca Christian König (2): amdgpu: remove sequence mutex amdgpu: serialize drmPrimeFDToHandle Emil Velikov (20): drm: add interface to get drm devices on the system v3 Move -lm link flag to LIBADD vbltest: fix variable

Hi Dave, On Wednesday 03 July 2013 10:17:34 Dave Airlie wrote: > On Wed, Jul 3, 2013 at 9:55 AM, Laurent Pinchart wrote: > > On Tuesday 02 July 2013 18:22:01 Dave Airlie wrote: > >> -----BEGIN PGP SIGNED MESSAGE----- > >> Hash: SHA1 > >> > >> Release because I want the cursor ioctls released, > >> also haswell and radeon ids. > > >

On 2017-06-22 13:49, Philippe CORNU wrote: > On 06/22/2017 08:06 AM, Peter Rosin wrote: >> The redundant fb helper .load_lut is no longer used, and can not >> work right without also providing the fb helpers .gamma_set and >> .gamma_get thus rendering the code in this driver suspect. >> > > Hi Peter, > STM32 chipsets supports 8-bit CLUT mode but this driver

On Thu, Jun 22, 2017 at 11:49:34AM +0000, Philippe CORNU wrote: > > > On 06/22/2017 08:06 AM, Peter Rosin wrote: > > The redundant fb helper .load_lut is no longer used, and can not > > work right without also providing the fb helpers .gamma_set and > > .gamma_get thus rendering the code in this driver suspect. > > > > Hi Peter, > STM32 chipsets

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Release because I want the cursor ioctls released, also haswell and radeon ids. Alex Deucher (3): radeon: add CIK chip families radeon: add Bonaire pci ids radeon: add kabini pci ids Damien Lespiau (3): intel/aub: Sync the AUB defines with mesa's intel/aub: Return early if we disable aub dumps intel/aub:

On Wed, Feb 7, 2018 at 12:01 PM, Ville Syrjälä <ville.syrjala at linux.intel.com> wrote: > On Wed, Feb 07, 2018 at 06:28:42PM +0200, Ville Syrjälä wrote: >> On Sun, Feb 04, 2018 at 06:50:45PM -0500, Ilia Mirkin wrote: >> > In case anyone's curious about 30bpp framebuffer support, here's the >> > current status: >> > >> > Kernel: >>

This came out of some debugging I was doing to figure out how BE mode works on this hardware. Among other things, it came out that we're not exposing 16-bpp mode support and that the ARGB8888 mode that we do expose is broken. Also the overlay logic was pretty broken, I must have only tested with very "normal" overlay buffer sizes with modetest before. That said, this code has only

On Wed, Feb 07, 2018 at 06:28:42PM +0200, Ville Syrjälä wrote: > On Sun, Feb 04, 2018 at 06:50:45PM -0500, Ilia Mirkin wrote: > > In case anyone's curious about 30bpp framebuffer support, here's the > > current status: > > > > Kernel: > > > > Ben and I have switched the code to using a 256-based LUT for Kepler+, > > and I've also written a