similar to: [PATCH -next] gpu: nouveau: Remove set but not used variable

This addresses the following gcc warning with "make W=1": drivers/gpu/drm/nouveau/dispnv50/disp.c: In function ?nv50_mstm_prepare?: drivers/gpu/drm/nouveau/dispnv50/disp.c:1378:6: warning: variable ?ret? set but not used [-Wunused-but-set-variable] Signed-off-by: Tian Tao <tiantao6 at hisilicon.com> --- drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +++ 1 file changed, 3

On Tue, 2020-09-22 at 17:25 +0800, Tian Tao wrote: > This addresses the following gcc warning with "make W=1": > drivers/gpu/drm/nouveau/dispnv50/disp.c: In function ?nv50_mstm_prepare?: > drivers/gpu/drm/nouveau/dispnv50/disp.c:1378:6: warning: > variable ?ret? set but not used [-Wunused-but-set-variable] > > Signed-off-by: Tian Tao <tiantao6 at hisilicon.com>

This addresses the following gcc warning with "make W=1": drivers/gpu/drm/nouveau/dispnv50/disp.c: In function ?nv50_mstm_prepare?: drivers/gpu/drm/nouveau/dispnv50/disp.c:1378:6: warning: variable ?ret? set but not used [-Wunused-but-set-variable] Signed-off-by: Tian Tao <tiantao6 at hisilicon.com> Reviewed-by: Lyude Paul <lyude at redhat.com> --- v2:Remove the braces

Some hardware (nvidia hardware in particular) needs to be notified of the exact VCPI and payload settings that the topology manager decided on for each mstb port. Since there isn't currently any way to get this information without going through port (which drivers are very much not supposed to do by themselves, ever), let's add one. Signed-off-by: Lyude Paul <lyude at redhat.com>

This addresses the following gcc warning with "make W=1": drivers/gpu/drm/nouveau/nouveau_svm.c: In function ?nouveau_pfns_map?: drivers/gpu/drm/nouveau/nouveau_svm.c:818:6: warning: variable ?ret? set but not used [-Wunused-but-set-variable] 818 | int ret; | ^~~ Reported-by: Hulk Robot <hulkci at huawei.com> Signed-off-by: Jason Yan <yanaijie at huawei.com>

On Fri, Nov 16, 2018 at 07:21:15PM -0500, Lyude Paul wrote: > Some hardware (nvidia hardware in particular) needs to be notified of > the exact VCPI and payload settings that the topology manager decided on > for each mstb port. Since there isn't currently any way to get this > information without going through port (which drivers are very much not > supposed to do by

On Wed, Aug 07, 2019 at 08:02:14AM -0700, Ralph Campbell wrote: > When memory is migrated to the GPU it is likely to be accessed by GPU > code soon afterwards. Instead of waiting for a GPU fault, map the > migrated memory into the GPU page tables with the same access permissions > as the source CPU page table entries. This preserves copy on write > semantics. > >

With DSC, bpp can be fractional in multiples of 1/16. Change drm_dp_calc_pbn_mode to reflect this, adding a new parameter bool dsc. When this parameter is true, treat the bpp parameter as having units not of bits per pixel, but 1/16 of a bit per pixel v2: Don't add separate function for this Cc: amd-gfx at lists.freedesktop.org Cc: nouveau at lists.freedesktop.org Cc: intel-gfx at

With DSC, bpp can be fractional in multiples of 1/16. Change drm_dp_calc_pbn_mode to reflect this, adding a new parameter bool dsc. When this parameter is true, treat the bpp parameter as having units not of bits per pixel, but 1/16 of a bit per pixel v2: Don't add separate function for this Cc: amd-gfx at lists.freedesktop.org Cc: nouveau at lists.freedesktop.org Cc: intel-gfx at

With DSC, bpp can be fractional in multiples of 1/16. Change drm_dp_calc_pbn_mode to reflect this, adding a new parameter bool dsc. When this parameter is true, treat the bpp parameter as having units not of bits per pixel, but 1/16 of a bit per pixel v2: Don't add separate function for this Cc: amd-gfx at lists.freedesktop.org Cc: nouveau at lists.freedesktop.org Cc: intel-gfx at

From: David Francis <David.Francis at amd.com> With DSC, bpp can be fractional in multiples of 1/16. Change drm_dp_calc_pbn_mode to reflect this, adding a new parameter bool dsc. When this parameter is true, treat the bpp parameter as having units not of bits per pixel, but 1/16 of a bit per pixel v2: Don't add separate function for this Change-Id:

With DSC, bpp can be fractional in multiples of 1/16. Change drm_dp_calc_pbn_mode to reflect this, adding a new parameter bool dsc. When this parameter is true, treat the bpp parameter as having units not of bits per pixel, but 1/16 of a bit per pixel v2: Don't add separate function for this Cc: amd-gfx at lists.freedesktop.org Cc: nouveau at lists.freedesktop.org Cc: intel-gfx at

clang with W=1 reports drivers/gpu/drm/nouveau/nouveau_svm.c:929:6: error: variable 'ret' set but not used [-Werror,-Wunused-but-set-variable] int ret; ^ This variable is not used so remove it. Signed-off-by: Tom Rix <trix at redhat.com> --- drivers/gpu/drm/nouveau/nouveau_svm.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git

nv50_msto_disable() does not call nv50_outp_release() to match nv50_outp_acquire() like other disable(). Add the missed call to fix it. Signed-off-by: Chuhong Yuan <hslester96 at gmail.com> --- drivers/gpu/drm/nouveau/dispnv50/disp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c index

When memory is migrated to the GPU, it is likely to be accessed by GPU code soon afterwards. Instead of waiting for a GPU fault, map the migrated memory into the GPU page tables with the same access permissions as the source CPU page table entries. This preserves copy on write semantics. Signed-off-by: Ralph Campbell <rcampbell at nvidia.com> Cc: Christoph Hellwig <hch at lst.de> Cc:

Fix call to nouveau_fence_emit() with wrong channel parameter. Fixes: 7f2a0b50b2b2 ("drm/nouveau: fence: separate fence alloc and emit") Signed-off-by: Danilo Krummrich <dakr at redhat.com> --- drivers/gpu/drm/nouveau/nouveau_dmem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_dmem.c b/drivers/gpu/drm/nouveau/nouveau_dmem.c

When memory is migrated to the GPU it is likely to be accessed by GPU code soon afterwards. Instead of waiting for a GPU fault, map the migrated memory into the GPU page tables with the same access permissions as the source CPU page table entries. This preserves copy on write semantics. Signed-off-by: Ralph Campbell <rcampbell at nvidia.com> Cc: Christoph Hellwig <hch at lst.de> Cc:

Fix the W=1 warning -Wunused-but-set-variable. Cc: Karol Herbst <kherbst at redhat.com> Cc: Lyude Paul <lyude at redhat.com> Cc: Danilo Krummrich <dakr at redhat.com> Cc: nouveau at lists.freedesktop.org Signed-off-by: Jani Nikula <jani.nikula at intel.com> --- drivers/gpu/drm/nouveau/nouveau_svm.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff

On Wed, Aug 07, 2019 at 08:02:14AM -0700, Ralph Campbell wrote: > When memory is migrated to the GPU it is likely to be accessed by GPU > code soon afterwards. Instead of waiting for a GPU fault, map the > migrated memory into the GPU page tables with the same access permissions > as the source CPU page table entries. This preserves copy on write > semantics. > >

Use the new MMU_NOTIFY_MIGRATE event to skip GPU MMU invalidations of device private memory and handle the invalidation in the driver as part of migrating device private memory. Signed-off-by: Ralph Campbell <rcampbell at nvidia.com> --- drivers/gpu/drm/nouveau/nouveau_dmem.c | 15 ++++++++++++--- drivers/gpu/drm/nouveau/nouveau_svm.c | 21 +++++++++------------