similar to: [PATCH] drm: Generalized NV Block Linear DRM format mod

On Mon, Oct 14, 2019 at 03:13:21PM -0700, James Jones wrote: > Builds upon the existing NVIDIA 16Bx2 block linear > format modifiers by adding more "fields" to the > existing parameterized > DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK format modifier > macro that allow fully defining a unique-across- > all-NVIDIA-hardware bit layout using a minimal > set of fields and values.

On Tue, Oct 15, 2019 at 5:14 PM James Jones <jajones at nvidia.com> wrote: > > On 10/15/19 7:19 AM, Daniel Vetter wrote: > > On Mon, Oct 14, 2019 at 03:13:21PM -0700, James Jones wrote: > >> Builds upon the existing NVIDIA 16Bx2 block linear > >> format modifiers by adding more "fields" to the > >> existing parameterized > >>

This series modifies the NV5x+ nouveau display backends to advertise appropriate format modifiers on their display planes in atomic mode setting blobs. Corresponding modifications to Mesa/userspace are available here: https://gitlab.freedesktop.org/cubanismo/mesa/tree/nouveau_work But those need a bit of cleanup before they're ready to submit. I've tested this on Tesla, Kepler, Pascal,

Builds upon the existing NVIDIA 16Bx2 block linear format modifiers by adding more "fields" to the existing parameterized DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK format modifier macro that allow fully defining a unique-across- all-NVIDIA-hardware bit layout using a minimal set of fields and values. The new modifier macro DRM_FORMAT_MOD_NVIDIA_BLOCK_LINEAR_2D is effectively backwards

Builds upon the existing NVIDIA 16Bx2 block linear format modifiers by adding more "fields" to the existing parameterized DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK format modifier macro that allow fully defining a unique-across- all-NVIDIA-hardware bit layout using a minimal set of fields and values. The new modifier macro DRM_FORMAT_MOD_NVIDIA_BLOCK_LINEAR_2D is effectively backwards

Builds upon the existing NVIDIA 16Bx2 block linear format modifiers by adding more "fields" to the existing parameterized DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK format modifier macro that allow fully defining a unique-across- all-NVIDIA-hardware bit layout using a minimal set of fields and values. The new modifier macro DRM_FORMAT_MOD_NVIDIA_BLOCK_LINEAR_2D is effectively backwards

On 10/15/19 7:19 AM, Daniel Vetter wrote: > On Mon, Oct 14, 2019 at 03:13:21PM -0700, James Jones wrote: >> Builds upon the existing NVIDIA 16Bx2 block linear >> format modifiers by adding more "fields" to the >> existing parameterized >> DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK format modifier >> macro that allow fully defining a unique-across- >>

This series modifies the NV5x+ nouveau display backends to advertise appropriate format modifiers on their display planes in atomic mode setting blobs. Corresponding modifications to Mesa/userspace are available here: https://gitlab.freedesktop.org/cubanismo/mesa/tree/nouveau_work But those need a bit of cleanup before they're ready to submit. I've tested this on Tesla, Kepler, Pascal,

This series modifies the NV5x+ nouveau display backends to advertise appropriate format modifiers on their display planes in atomic mode setting blobs. Corresponding modifications to Mesa/userspace are available on the Mesa-dev mailing list as the series: nouveau: Improved format modifier support I've tested this on Tesla, Kepler, Pascal, and Turing-class hardware using various formats

This series modifies the NV5x+ nouveau display backends to advertise appropriate format modifiers on their display planes in atomic mode setting blobs. Corresponding modifications to Mesa/userspace are available on the Mesa-dev gitlab merge request 3724: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3724 I've tested this on Tesla, Kepler, Pascal, and Turing-class hardware using

This series modifies the NV5x+ nouveau display backends to advertise appropriate format modifiers on their display planes in atomic mode setting blobs. Corresponding modifications to Mesa/userspace are available on the Mesa-dev gitlab merge request 3724: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3724 I've tested this on Tesla, Kepler, Pascal, and Turing-class hardware using

On 7/17/20 12:47 PM, Daniel Vetter wrote: > On Fri, Jul 17, 2020 at 11:57:57AM -0700, James Jones wrote: >> Accept the DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK() >> family of modifiers to handle broken userspace >> Xorg modesetting and Mesa drivers. >> >> Tested with Xorg 1.20 modesetting driver, >> weston at c46c70dac84a4b3030cd05b380f9f410536690fc, >> gnome

Accept the DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK() family of modifiers to handle broken userspace Xorg modesetting and Mesa drivers. Tested with Xorg 1.20 modesetting driver, weston at c46c70dac84a4b3030cd05b380f9f410536690fc, gnome & KDE wayland desktops from Ubuntu 18.04, and sway 1.5 Signed-off-by: James Jones <jajones at nvidia.com> --- drivers/gpu/drm/nouveau/nouveau_display.c | 26

This series adds basic drm_panic support for nouveau. I've tested on GTX1650 (Turing), GeForce GT 1030 (Pascal) and Geforce 8800 GTS (Tesla), running Gnome/Wayland desktop, and in VT. It should work on other nv50+ cards, but I didn't test them. To test it, you need to build your kernel with CONFIG_DRM_PANIC=y, and run: echo c > /proc/sysrq-trigger or you can enable

Please ignore the tegra diff on the bottom of this. I never fail to find a way to mess up git-send-email. -James On 12/11/19 12:59 PM, James Jones wrote: > This series modifies the NV5x+ nouveau display backends to advertise > appropriate format modifiers on their display planes in atomic mode > setting blobs. > > Corresponding modifications to Mesa/userspace are available

Accept the DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK() family of modifiers to handle broken userspace Xorg modesetting and Mesa drivers. Existing Mesa drivers are still aware of only these older format modifiers which do not differentiate between different variations of the block linear layout. When the format modifier support flag was flipped in the nouveau kernel driver, the X.org modesetting driver

nouveau supports the Tegra K1 and higher after the SoC-based GPUs converged with the main GeForce GPU families. Signed-off-by: Rhys Kidd <rhyskidd at gmail.com> --- drivers/gpu/drm/nouveau/nouveau_drv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 822fe1d4d35e..fbe42ec0a5f1 100644 ---

This series adds basic drm_panic support for nouveau. Patches 1-2 Add missing bits in drm_panic (ABGR2101010, private data for set_pixel()) Patch 3 registers nouveau to drm_panic, and handle tiling. I've tested on a GTX1650, while running Gnome/Wayland desktop. It should work on other nv50+ cards, but I didn't test them. To test it, you need to build your kernel with CONFIG_DRM_PANIC=y,

On 7/23/20 9:06 PM, Ben Skeggs wrote: > On Sat, 18 Jul 2020 at 13:34, James Jones <jajones at nvidia.com> wrote: >> >> Accept the DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK() >> family of modifiers to handle broken userspace >> Xorg modesetting and Mesa drivers. Existing Mesa >> drivers are still aware of only these older >> format modifiers which do not

On Wed, 29 Jul 2020 at 12:48, Dave Airlie <airlied at gmail.com> wrote: > > On Tue, 28 Jul 2020 at 04:51, James Jones <jajones at nvidia.com> wrote: > > > > On 7/23/20 9:06 PM, Ben Skeggs wrote: > > > On Sat, 18 Jul 2020 at 13:34, James Jones <jajones at nvidia.com> wrote: > > >> > > >> Accept the