similar to: Questions on GPU syncpoint handling from inside the GPU

bump El mar., 2 abr. 2019 a las 11:11, Fernando Sahmkow (<fsahmkow27 at gmail.com>) escribió: > Hi guys how are you doing? I have some questions on how the GPU handles > syncpoints from the commandlist. > > I do know the register 0xB2 is the one written in the Maxwell3D Engine. As > far as I know bits 0:15 are the syncpoint id, bit 16 is unknown for me, bit > 20 is

So I have been implementing syncing mechanisms to yuzu's switch emulator, aka Tegra X1 emulation and I already have: Semaphores, Syncpoints and Queries to some extent. I'm missing the barriers (GPU waits for CPU): I got this from RE: Barrier mode has priority (from highest to lowest): 1) 0x08 sets needsWfi=0 -> highest priority, does puller refcnt + split(0,0) + 0x100 NoOperation + rest

I'm currently running tests to document PASCAL's ISA on Cuda but I've come to a dead end with the IPA instruction. I've tried searching around Nouveau's codebase for clues but I've fallen short from it. Could someone reference me in the right direction? -- Atentamente, *Fernando A. Sahmkow* *Correo*: fsahmkow27 at gmail.com -------------- next part -------------- An HTML

So I'm trying to track an special value in IPA instruction generation. https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp#L2561 Register on 0x14 (20) is set to some source on "insn->op == OP_PINTERP" I have found while emulation that such value can be set sometimes to FragCoord.w, I don't however know what that value is and

Hello, I got some doubts on how texture modes work on TEX, TEXS, TLD4, etc instructions. I got: DC, AOFFI, NDV, NODEP, MZ, PTP modes as well as LZ Mode. How does this work or change the behavior of the texture instruction. So far of those I know AOFFI defines an Offset but I'm on blanks for the rest. -------------- next part -------------- An HTML attachment was scrubbed... URL:

Thanks for the last info it was truely helpful. Anyways, I'm currently trying to implement 3D textures into yuzu, as far as I know they are twiddled in a different manner to 2D textures. Could one of you guys point me in the right direction? I've been meddling around: https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/nouveau/nv50/nv50_tex.c but I can't see where the

So there's a register in Render Targets called Array Mode: https://github.com/envytools/envytools/blob/master/rnndb/graph/gf100_3d.xml#L289 We've witnessed values of 1 and 6 (array mode -> layers) but we can't tell their meaning. Do you guys got any related info? Thanks in advance. -------------- next part -------------- An HTML attachment was scrubbed... URL:

I'm currently implementing mipmaps but I have a set of troubles guessing the block height and block depth of them. According to https://envytools.readthedocs.io/en/latest/hw/memory/g80-surface.html#textures-mipmapping-and-arrays the texture unit auto resizes mipmaps' blocks but how do I know how many blocks each one uses? I'm currently using this algorithm: u32 height =

So I have been going on over the documentation trying to figure out the exact layout of Pitch Linear Textures and find some missing values. First Question: What's the correct layout of pitch linear textures in memory? Is padding of the pitch added at start or at the end? Do they have some kind of header? Currently I see them as a normal texture matrix with just pitch at the end of each row

So now I'm to looking to implement NVDec and as far as I know the game submits a series of commands to the service. This commands are processed by Falcon and then it does its magic. Do you guys got any RE on Falcon commands and how they execute different workloads ? -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hi guys again. A homebrew developer (homebrew is custom software made for the switch using openGL under nouveau) reported to me that 'glGenerateMipmap' wasn't working on yuzu (Nintendo Switch emulator). I looked into it and I noticed all the triangle data used by nouveau to render the mipmaps was all zeroed out, meaning that probably we don't implement the mechanism you guys use to

Hello everyone, I've been trying to adapt a switch emulator to emulate nouveau's compute. We've been told some things like indirect dispatch use the MME in Nouveau, however, looking at NVIDIA's open gpu documentation there's no MME in compute engine since Kepler. https://github.com/NVIDIA/open-gpu-doc/blob/master/classes/compute/clb1c0.h MME for compute should still exist

So we have been busy implementing the compute engine lately but we have discovered a few issues with Compute Shaders. I hope you guys can answer some questions. 1st How do I determine the size of Compute Shaders/Kernel Local Memory ? In Pipeline shaders the size is included in the header but Compute Kernels don't have a header, so how do I determine how much local memory it uses? In case I

So we are currently doing tests and complying with them in our Emulator. Currently the conditional rendering test does not pass (no wonder we not even implement it). I've been looking at the current documentation https://github.com/envytools/envytools/blob/master/rnndb/graph/gf100_3d.xml#L796 So far I don't understand how the cond address is used and to what it's compared.

From: Thierry Reding <treding at nvidia.com> This set of patches adds support for fences to Tegra DRM and complements the fence FD support for Nouveau. Technically this isn't necessary for a fence-based synchronization loop with Nouveau because the KMS core takes care of all that, but engines behind host1x can use the IOCTL extensions provided here to emit fence FDs that in turn can be

Hi, I'm trying to compile asterisk-oh323-0.7.1 in FreeBSD 5.3. I tried to use gmake but it exits with too many errors. Did somebody compile before oh323 in FreeBSD? How should I compile it under FreeBSD? thanks, Ganbold

I'm trying to make the chan_h323 in /usr/src/asterisk/channels/h323 But I'm getting all kinds of errors about PWLIB... I built using the newest PWLIB and OpenH323 from CVS Error log from make below make g++ -g -c -fno-rtti -o ast_h323.o -march=i686 -DPBYTE_ORDER=PLITTLE_ENDIAN -DNDEBUG -DDO_CRASH -DDEBUG_THREADS -pipe -Wall -fPIC -DP_LINUX -D_REENTRANT -D_GNU_SOURCE -DP_HAS_SEMAPHORES

Following is the errors when I tried to compile oh323 in FreeBSD 5.3. Asterisk is updated from cvs. asterisk# gmake for x in wrapper asterisk-driver; do gmake -C $x build || exit 1 ; done make: illegal option -- - usage: make [-BPSXeiknqrstv] [-C directory] [-D variable] [-d flags] [-E variable] [-f makefile] [-I directory] [-j max_jobs] [-m directory] [-V variable]

I'm trying to make the chan_h323 in /usr/src/asterisk/channels/h323 But I'm getting all kinds of errors about PWLIB... I built using the newest PWLIB and OpenH323 from CVS Error log from make below make g++ -g -c -fno-rtti -o ast_h323.o -march=i686 -DPBYTE_ORDER=PLITTLE_ENDIAN -DNDEBUG -DDO_CRASH -DDEBUG_THREADS -pipe -Wall -fPIC -DP_LINUX -D_REENTRANT -D_GNU_SOURCE -DP_HAS_SEMAPHORES

From: Mikko Perttunen <mperttunen at nvidia.com> Add an implementation of DMA fences backed by Host1x syncpoints, an interface to specify a prefence for job submissions. Before submission, prefences containing only Host1x syncpoints are waited by pushing wait commands to CDMA, whereas other fences are CPU-waited. Signed-off-by: Mikko Perttunen <mperttunen at nvidia.com>