similar to: Question on IPA on GM107

https://bugs.freedesktop.org/show_bug.cgi?id=66642 Priority: medium Bug ID: 66642 Assignee: nouveau at lists.freedesktop.org Summary: [nva5] Wrong provoking vertex is selected for flat attribute interpolation (clipping?) Severity: normal Classification: Unclassified OS: Linux (All) Reporter:

I'm currently running tests to document PASCAL's ISA on Cuda but I've come to a dead end with the IPA instruction. I've tried searching around Nouveau's codebase for clues but I've fallen short from it. Could someone reference me in the right direction? -- Atentamente, *Fernando A. Sahmkow* *Correo*: fsahmkow27 at gmail.com -------------- next part -------------- An HTML

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- .../drivers/nouveau/codegen/nv50_ir_driver.h | 1 + .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 27 ++++++++++++++++++++-- 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h

previously, if we had something like: gl_ViewportIndex = idx; for(int i = 0; i < gl_in.length(); i++) { gl_Position = gl_in[i].gl_Position; EmitVertex(); } EndPrimitive(); we failed to set the right ViewportIndex. To resolve this, save the ViewportIndex and store it to the right register on each emit. This fixes the remaining piglit tests in ARB_viewport_array for nvc0. Note: Not

previously, if we had something like: gl_ViewportIndex = idx; for(int i = 0; i < gl_in.length(); i++) { gl_Position = gl_in[i].gl_Position; EmitVertex(); } EndPrimitive(); we failed to set the right ViewportIndex. To resolve this, save the ViewportIndex and store it to the right register on each emit. This fixes the remaining piglit tests in ARB_viewport_array for nvc0. Note: Not

There is no dedicated instruction for this, so just combine it with the constant offset. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: "10.3" <mesa-stable at lists.freedesktop.org> --- This fixes the spec/glsl-1.50/execution/geometry/dynamic_input_array_index piglit test. src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp | 5 ++++- 1 file changed,

Spotted by coccinelle: drivers/gpu/drm/nouveau/core/subdev/fuse/gm107.c:50:5-8: WARNING: end returns can be simpified Signed-off-by: Martin Peres <martin.peres at free.fr> --- drm/nouveau/nvkm/subdev/fuse/gm107.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/fuse/gm107.c b/drm/nouveau/nvkm/subdev/fuse/gm107.c index ba19158..0b256aa 100644

Hello, The method we previously used on Fermi and Kepler (0x142c) to flush the VBO cache before draw appears to be gone on Maxwell. Is there a replacement method we should use? (Or perhaps that method was never meant for VBO cache flush and instead flushed something related to the vertex quarantine area defined by 0x17bc/0x17c0/0x17c4, which in turn is gone on Maxwell?) Thanks for any light you

Patch "ltc/gm107: use nvkm_mask to set cbc_ctrl1" sets the 3rd bit of the CTRL1 register instead of writing it entirely in gm107_ltc_cbc_clear(). As a counterpart, gm107_ltc_cbc_wait() must also be modified to wait on that single bit only, otherwise a timeout may occur if some other bit of that register is set. This happened at least on GM206 when running glmark2-drm. While we are at

Signed-off-by: Karol Herbst <nouveau at karolherbst.de> --- drm/nouveau/nvkm/subdev/fb/gm107.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drm/nouveau/nvkm/subdev/fb/gm107.c b/drm/nouveau/nvkm/subdev/fb/gm107.c index 2a91df8..9cc7e61 100644 --- a/drm/nouveau/nvkm/subdev/fb/gm107.c +++ b/drm/nouveau/nvkm/subdev/fb/gm107.c @@ -29,7 +29,7 @@ gm107_fb = { .dtor =

We get 1 warning when build kernel with W=1: drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c:312:1: warning: no previous prototype for 'gm107_gr_init' [-Wmissing-prototypes] In fact, this function is only used in the file in which it is declared and don't need a declaration, but can be made static. so this patch marks this function with 'static'. Signed-off-by: Baoyou Xie

https://bugs.freedesktop.org/show_bug.cgi?id=98391 Bug ID: 98391 Summary: [GM107] priv: HUB0: 614900 00800000 (1d408200) Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Driver/nouveau

https://bugs.freedesktop.org/show_bug.cgi?id=103409 Bug ID: 103409 Summary: [GM107] reboot/suspend/lspci hang with nouveau Product: Mesa Version: 17.2 Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/nouveau

https://bugs.freedesktop.org/show_bug.cgi?id=106662 Bug ID: 106662 Summary: nouveau DPMS poblem with DRI3 (GM107) Product: Mesa Version: unspecified Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/nouveau Assignee: nouveau at

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: "10.3" <mesa-stable at lists.freedesktop.org> --- With this, all the tex-miplevel-selection tests pass on maxwell. There is a minor bit of this change which affects textureGrad on kepler that I have yet to test, but I'm moderately sure it's correct and was only working by luck before. (Changing the insbf to use

Just like how the P50 will occasionally leave the disp's core channel on before nouveau starts initializing, it will occasionally do the same thing with the rest of the dmac channel in addition to the core channel. Example: [ 1.604375] nouveau 0000:01:00.0: disp: outp 04:0006:0f81: no heads (0 3 4) [ 1.604858] nouveau 0000:01:00.0: disp: outp 04:0006:0f81: aux power -> always [

https://bugs.freedesktop.org/show_bug.cgi?id=90054 Bug ID: 90054 Summary: white screen reboot on gm107 with multiple monitors Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Driver/nouveau

https://bugs.freedesktop.org/show_bug.cgi?id=106132 Bug ID: 106132 Summary: bar.sync encoding incorrect for GM107 Product: Mesa Version: git Hardware: All OS: All Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/nouveau Assignee: nouveau at

Unfortunately there's no sure-fire way to distinguish a sched "op" from regular ones. They happen purely based on position. So for disassembly, use the byte position in the file to determine whether the current op should be decoded as sched or as regular. For assembly, we go back to using a shared table. Ideally we would pick out which one to use based on the position in the

https://bugs.freedesktop.org/show_bug.cgi?id=102860 Bug ID: 102860 Summary: Nvidia 940MX (NV118, GM108) is reported as a NV117, GM107 Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: minor Priority: medium Component: