similar to: Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues

Displaying 20 results from an estimated 12000 matches similar to: "Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues"

2018 Aug 28
6
Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues
On Fri, Aug 24, 2018 at 11:42 PM, Peter Wu <peter at lekensteyn.nl> wrote: > Are these systems also affected through runtime power management? For > example: > > modprobe nouveau # should enable runtime PM > sleep 6 # wait for runtime suspend to kick in > lspci -s1: # runtime resume by reading PCI config space > > On laptops from
2018 Aug 24
0
Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues
Hi Daniel, On Fri, Aug 24, 2018 at 11:31:54AM +0800, Daniel Drake wrote: > Hi, > > We are facing a suspend/resume problem with many different Asus laptop > models (30+ products) with Intel chipsets (multiple generations) and > nvidia GPUs (several different ones). Reproducers include: Are these systems also affected through runtime power management? For example: modprobe
2018 Aug 29
0
Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues
On Tue, Aug 28, 2018 at 4:23 AM, Daniel Drake <drake at endlessm.com> wrote: > On Fri, Aug 24, 2018 at 11:42 PM, Peter Wu <peter at lekensteyn.nl> wrote: >> Are these systems also affected through runtime power management? For >> example: >> >> modprobe nouveau # should enable runtime PM >> sleep 6 # wait for runtime suspend to
2018 Aug 28
0
Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues
On Tue, Aug 28, 2018 at 10:23:24AM +0800, Daniel Drake wrote: > On Fri, Aug 24, 2018 at 11:42 PM, Peter Wu <peter at lekensteyn.nl> wrote: > > Are these systems also affected through runtime power management? For > > example: > > > > modprobe nouveau # should enable runtime PM > > sleep 6 # wait for runtime suspend to kick in > >
2018 Sep 07
9
[PATCH] PCI: Reprogram bridge prefetch registers on resume
On 38+ Intel-based Asus products, the nvidia GPU becomes unusable after S3 suspend/resume. The affected products include multiple generations of nvidia GPUs and Intel SoCs. After resume, nouveau logs many errors such as: fifo: fault 00 [READ] at 0000005555555000 engine 00 [GR] client 04 [HUB/FE] reason 4a [] on channel -1 [007fa91000 unknown] DRM: failed to idle channel 0 [DRM]
2018 Aug 31
6
[PATCH] PCI: add prefetch quirk to work around Asus/Nvidia suspend issues
On over 40 Intel-based Asus products, the nvidia GPU becomes unusable after S3 suspend/resume. The affected products include multiple generations of nvidia GPUs and Intel SoCs. After resume, nouveau logs many errors such as: fifo: fault 00 [READ] at 0000005555555000 engine 00 [GR] client 04 [HUB/FE] reason 4a [] on channel -1 [007fa91000 unknown] DRM: failed to idle channel 0 [DRM]
2018 Aug 31
0
[PATCH] PCI: add prefetch quirk to work around Asus/Nvidia suspend issues
[+cc Intel folks] On Fri, Aug 31, 2018 at 03:30:57PM +0800, Daniel Drake wrote: > On over 40 Intel-based Asus products, the nvidia GPU becomes unusable > after S3 suspend/resume. The affected products include multiple > generations of nvidia GPUs and Intel SoCs. After resume, nouveau logs > many errors such as: > > fifo: fault 00 [READ] at 0000005555555000 engine 00 [GR]
2018 Sep 13
4
[PATCH v3] PCI: Reprogram bridge prefetch registers on resume
On 38+ Intel-based Asus products, the nvidia GPU becomes unusable after S3 suspend/resume. The affected products include multiple generations of nvidia GPUs and Intel SoCs. After resume, nouveau logs many errors such as: fifo: fault 00 [READ] at 0000005555555000 engine 00 [GR] client 04 [HUB/FE] reason 4a [] on channel -1 [007fa91000 unknown] DRM: failed to idle channel 0 [DRM]
2018 Sep 12
3
[PATCH v2] PCI: Reprogram bridge prefetch registers on resume
On 38+ Intel-based Asus products, the nvidia GPU becomes unusable after S3 suspend/resume. The affected products include multiple generations of nvidia GPUs and Intel SoCs. After resume, nouveau logs many errors such as: fifo: fault 00 [READ] at 0000005555555000 engine 00 [GR] client 04 [HUB/FE] reason 4a [] on channel -1 [007fa91000 unknown] DRM: failed to idle channel 0 [DRM]
2018 Sep 27
2
[PATCH v3] PCI: Reprogram bridge prefetch registers on resume
[+cc LKML] On Tue, Sep 18, 2018 at 04:32:44PM -0500, Bjorn Helgaas wrote: > On Thu, Sep 13, 2018 at 11:37:45AM +0800, Daniel Drake wrote: > > On 38+ Intel-based Asus products, the nvidia GPU becomes unusable > > after S3 suspend/resume. The affected products include multiple > > generations of nvidia GPUs and Intel SoCs. After resume, nouveau logs > > many errors such
2018 Aug 30
2
Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues
On Tue, Aug 28, 2018 at 5:57 PM, Peter Wu <peter at lekensteyn.nl> wrote: > Just to be sure, after "sleep", do both devices report "suspended" in > /sys/bus/pci/devices/0000:00:1c.0/power/runtime_status > /sys/bus/pci/devices/0000:01:00.0/power/runtime_status > > and was this reproduced with a recent mainline kernel with no special > cmdline options? The
2018 Sep 04
1
[PATCH] PCI: add prefetch quirk to work around Asus/Nvidia suspend issues
On Tue, Sep 4, 2018 at 2:43 PM, Mika Westerberg <mika.westerberg at linux.intel.com> wrote: > Yes, can you check if the failing device BAR is included in any of the > above entries? If not then it is probably not related. mtrr again for reference: reg00: base=0x0c0000000 ( 3072MB), size= 1024MB, count=1: uncachable reg01: base=0x0a0000000 ( 2560MB), size= 512MB, count=1: uncachable
2018 Sep 05
1
Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues
On Tue, Aug 28, 2018 at 5:57 PM, Peter Wu <peter at lekensteyn.nl> wrote: > Only non-bridge devices can be passed to a guest, but perhaps logging > access to the emulated bridge is already sufficient. The Prefetchable > Base Upper 32 Bits register is at offset 0x28. > > In a trace where the Nvidia device is disabled/enabled via Device > Manager, I see writes on the enable
2019 Nov 21
2
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
On Thu, Nov 21, 2019 at 5:06 PM Karol Herbst <kherbst at redhat.com> wrote: > > On Thu, Nov 21, 2019 at 4:47 PM Rafael J. Wysocki <rafael at kernel.org> wrote: > > > > On Thu, Nov 21, 2019 at 1:53 PM Karol Herbst <kherbst at redhat.com> wrote: > > > > > > On Thu, Nov 21, 2019 at 12:46 PM Mika Westerberg > > > <mika.westerberg at
2018 Aug 30
0
Rewriting Intel PCI bridge prefetch base address bits solves nvidia graphics issues
On Thu, Aug 30, 2018 at 03:41:43PM +0800, Daniel Drake wrote: > On Tue, Aug 28, 2018 at 5:57 PM, Peter Wu <peter at lekensteyn.nl> wrote: > > Just to be sure, after "sleep", do both devices report "suspended" in > > /sys/bus/pci/devices/0000:00:1c.0/power/runtime_status > > /sys/bus/pci/devices/0000:01:00.0/power/runtime_status > > > > and
2020 Mar 29
3
Upgrade to CentOS8
Hi Leon, I don't have the infra (nor the knowledge or expertise) to create a LiveCD I didn't think about Fedora. This is indeed a good pointer, I will definitely try that Actually, I'm not too worried about the basics, but rather about the wifi, audio & video drivers (one of the boxes is a multimedia system) Thanks!
2018 Sep 13
0
[PATCH v3] PCI: Reprogram bridge prefetch registers on resume
On Thu, Sep 13, 2018 at 5:37 AM Daniel Drake <drake at endlessm.com> wrote: > > On 38+ Intel-based Asus products, the nvidia GPU becomes unusable > after S3 suspend/resume. The affected products include multiple > generations of nvidia GPUs and Intel SoCs. After resume, nouveau logs > many errors such as: > > fifo: fault 00 [READ] at 0000005555555000 engine 00 [GR]
2018 Sep 18
0
[PATCH v3] PCI: Reprogram bridge prefetch registers on resume
On Thu, Sep 13, 2018 at 11:37:45AM +0800, Daniel Drake wrote: > On 38+ Intel-based Asus products, the nvidia GPU becomes unusable > after S3 suspend/resume. The affected products include multiple > generations of nvidia GPUs and Intel SoCs. After resume, nouveau logs > many errors such as: > > fifo: fault 00 [READ] at 0000005555555000 engine 00 [GR] client 04 >
2018 Sep 04
2
[PATCH] PCI: add prefetch quirk to work around Asus/Nvidia suspend issues
On Mon, Sep 3, 2018 at 8:12 PM, Mika Westerberg <mika.westerberg at linux.intel.com> wrote: > We have seen one similar issue with LPSS devices when BIOS assigns > device BARs above 4G (which is not the case here) and it turned out to > be misconfigured MTRR register or something like that. It may not be > related at all but it could be worth a try to dump out MTRR registers of
2018 Sep 12
0
[PATCH v2] PCI: Reprogram bridge prefetch registers on resume
On Wed, Sep 12, 2018 at 8:45 AM Daniel Drake <drake at endlessm.com> wrote: > > On 38+ Intel-based Asus products, the nvidia GPU becomes unusable > after S3 suspend/resume. The affected products include multiple > generations of nvidia GPUs and Intel SoCs. After resume, nouveau logs > many errors such as: > > fifo: fault 00 [READ] at 0000005555555000 engine 00 [GR]