Displaying 20 results from an estimated 900 matches similar to: "[PATCH v3 0/6] improve feature detection"
2018 Jul 20
7
[PATCH 0/6] improve feature detection
This is mainly for dropping interlaced modes on DP connectors if the GPU
would otherwise display garbage or EVO timesout.
It also adds experimental detection of the HDMI clock limit we currently
hard limit depending on the GPU generation.
Starting with GF110 GPUs, we can retrieve the limit directly from the GPU
and may make the hdmimhz parameter obsolete.
Testing this series with 2560x1440 or
2018 Aug 03
2
[PATCH v3 5/6] kms/nv50: detect HDMI max MHz correctly
On Fri, Aug 3, 2018 at 8:19 AM, Karol Herbst <kherbst at redhat.com> wrote:
> v2: clean up left over comments
> don't overwrite hdmimhz parameter
> cap to 297MHz
>
> Signed-off-by: Karol Herbst <kherbst at redhat.com>
> ---
> drm/nouveau/dispnv50/disp.c | 5 +++++
> drm/nouveau/nouveau_connector.c | 15 ++++++++++-----
>
2018 Jul 20
1
[PATCH 5/6] kms/nv50: detect HDMI max MHz correctly
This removes user control to force a hdmimhz. Given the vast variety
of hardware and display configurations out there, I don't see how a
patch like this won't blow up in our faces.
I'm not saying we shouldn't do it -- we should attempt to respect the
various maximums in the vbios, but until we get a solid handle on
things, we should allow more user-configurability, not less, for
2020 May 11
6
[PATCH v3 0/5] drm/nouveau: DP interlace fixes
Currently, nouveau doesn't actually bother to try probing whether or not
it can actually handle interlaced modes over DisplayPort. As a result,
on volta and later we'll end up trying to set an interlaced mode even
when it's not supported and cause the front end for the display engine
to hang.
So, let's teach nouveau to reject interlaced modes on hardware that
can't actually
2020 Feb 14
5
[PATCH v2 0/5] drm/nouveau: DP interlace fixes
Currently, nouveau doesn't actually bother to try probing whether or not
it can actually handle interlaced modes over DisplayPort. As a result,
on volta and later we'll end up trying to set an interlaced mode even
when it's not supported and cause the front end for the display engine
to hang.
So, let's teach nouveau to reject interlaced modes on hardware that
can't actually
2018 Jul 19
0
[PATCH] kms/nv50: reject interlaced modes if the hardware doesn't support it
I ran into this issue on a gm204 GPU with a display reporting interlaced
modes. Nvidia dropped those modelines for DP, but not HDMI.
We should do the same on hardware where interlaced modes aren't supported
via DP.
Signed-off-by: Karol Herbst <kherbst at redhat.com>
---
drm/nouveau/dispnv50/core.h | 10 ++++++++++
drm/nouveau/dispnv50/core507d.c | 25 +++++++++++++++++++++++++
2020 Aug 24
4
[PATCH 0/2] drm/nouveau: Backport SOR/PIOR probing fixes for v5.8
These didn't apply cleanly to v5.8, so here's a backported version.
Lyude Paul (2):
drm/nouveau/kms/nv50-: Program notifier offset before requesting disp
caps
drm/nouveau/kms/nv50-: Log SOR/PIOR caps
drivers/gpu/drm/nouveau/dispnv50/core507d.c | 25 ++++++++++++++++-----
drivers/gpu/drm/nouveau/dispnv50/disp.c | 10 +++++++++
2 files changed, 29 insertions(+), 6 deletions(-)
2020 Sep 04
3
[PATCH v5 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
Not entirely sure why this never came up when I originally tested this
(maybe some BIOSes already have this setup?) but the ->caps_init vfunc
appears to cause the display engine to throw an exception on driver
init, at least on my ThinkPad P72:
nouveau 0000:01:00.0: disp: chid 0 mthd 008c data 00000000 0000508c 0000102b
This is magic nvidia speak for "You need to have the DMA notifier
2019 Sep 13
6
[PATCH 1/4] drm/nouveau: dispnv50: Don't create MSTMs for eDP connectors
On the ThinkPad P71, we have one eDP connector exposed along with 5 DP
connectors, resulting in a total of 11 TMDS encoders. Since the GPU on
this system is also capable of MST, we create an additional 4 fake MST
encoders for each DP port. Unfortunately, we also do this for the eDP
port as well, resulting in:
1 eDP port: +1 TMDS encoder
+4 DPMST encoders
5 DP ports: +2 TMDS
2020 Nov 14
1
[PATCH 1/8] drm/nouveau/kms/nv50-: Use atomic encoder callbacks everywhere
It turns out that I forgot to go through and make sure that I converted all
encoder callbacks to use atomic_enable/atomic_disable(), so let's go and
actually do that.
Signed-off-by: Lyude Paul <lyude at redhat.com>
Cc: Kirill A. Shutemov <kirill at shutemov.name>
Fixes: 09838c4efe9a ("drm/nouveau/kms: Search for encoders' connectors properly")
---
2020 Sep 01
3
[PATCH v3] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
Not entirely sure why this never came up when I originally tested this
(maybe some BIOSes already have this setup?) but the ->caps_init vfunc
appears to cause the display engine to throw an exception on driver
init, at least on my ThinkPad P72:
nouveau 0000:01:00.0: disp: chid 0 mthd 008c data 00000000 0000508c 0000102b
This is magic nvidia speak for "You need to have the DMA notifier
2020 Aug 20
22
[RFC v2 00/20] drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915
To start off: this patch series is less work to review then it looks -
most (but not all) of the nouveau related work has already been reviewed
elsewhere. Most of the reason I'm asking for an RFC here is because this
code pulls a lot of code out of i915 and into shared DP helpers.
Anyway-nouveau's HPD related code has been collecting dust for a while.
Other then the occasional runtime PM
2020 Aug 25
22
[RFC v4 00/20] drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915
Most of the reason I'm asking for an RFC here is because this
code pulls a lot of code out of i915 and into shared DP helpers.
Anyway-nouveau's HPD related code has been collecting dust for a while.
Other then the occasional runtime PM related and MST related fixes,
we're missing a lot of nice things that have been added to DRM since
this was originally written. Additionally, the code
2020 Aug 26
23
[PATCH v5 00/20] drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915
Most of the reason I'm asking for an RFC here is because this
code pulls a lot of code out of i915 and into shared DP helpers.
Anyway-nouveau's HPD related code has been collecting dust for a while.
Other then the occasional runtime PM related and MST related fixes,
we're missing a lot of nice things that have been added to DRM since
this was originally written. Additionally, the code
2020 Aug 11
29
[RFC 00/20] drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915
To start off: this patch series is less work to review then it looks -
most (but not all) of the nouveau related work has already been reviewed
elsewhere. Most of the reason I'm asking for an RFC here is because this
code pulls a lot of code out of i915 and into shared DP helpers.
Anyway-nouveau's HPD related code has been collecting dust for a while.
Other then the occasional runtime PM
2020 Jan 17
1
[PATCH -next] drm/nouveau/kms/nv50: remove set but not unused variable 'nv_connector'
drivers/gpu/drm/nouveau/dispnv50/disp.c: In function nv50_pior_enable:
drivers/gpu/drm/nouveau/dispnv50/disp.c:1672:28: warning:
variable nv_connector set but not used [-Wunused-but-set-variable]
commit ac2d9275f371 ("drm/nouveau/kms/nv50-: Store the
bpc we're using in nv50_head_atom") left behind this.
Reported-by: Hulk Robot <hulkci at huawei.com>
Signed-off-by: YueHaibing
2020 Aug 07
4
[PATCH v2 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
Not entirely sure why this never came up when I originally tested this
(maybe some BIOSes already have this setup?) but the ->caps_init vfunc
appears to cause the display engine to throw an exception on driver
init, at least on my ThinkPad P72:
nouveau 0000:01:00.0: disp: chid 0 mthd 008c data 00000000 0000508c 0000102b
This is magic nvidia speak for "You need to have the DMA notifier
2020 Feb 12
8
[PATCH 0/4] drm/nouveau: DP interlace fixes
Currently, nouveau doesn't actually bother to try probing whether or not
it can actually handle interlaced modes over DisplayPort. As a result,
on volta and later we'll end up trying to set an interlaced mode even
when it's not supported and cause the front end for the display engine
to hang.
So, let's teach nouveau to reject interlaced modes on hardware that
can't actually
2020 Nov 06
4
[PATCH 0/3] drm/nouveau: extend the lifetime of nouveau_drm
Hi folks,
Currently, when the device is removed (or the driver is unbound) the
nouveau_drm structure de-allocated. However, it's still accessible from
and used by some DRM layer callbacks. For example, file handles can be
closed after the device has been removed (physically or otherwise). This
series converts the Nouveau device structure to be allocated and
de-allocated with the
2014 Aug 12
6
[PATCH 0/4] Some initial tidy-ups and refactoring
The patches contain some tidy-up work, and refactoring that has arisen
as a by-product of my initial work on adding TV support to nv50.
Joel Holdsworth (4):
drm/nouveau: Removed unneeded include in nvc0_fence.c
drm/nouveau: Replaced magic numbers with defines from nouveau_reg
drm/nouveau: Replaced copy-pasted nv_wait with nv50_wait_dpms_ctrl
helper
drm/nouveau: Refactored encoder