similar to: [PATCH v3 0/2] drm/nouveau: tegra: Detach from ARM DMA/IOMMU mapping

On 30/05/18 09:03, Thierry Reding wrote: > From: Thierry Reding <treding at nvidia.com> > > Implement this function to enable drivers from detaching from any IOMMU > domains that architecture code might have attached them to so that they > can take exclusive control of the IOMMU via the IOMMU API. > > Signed-off-by: Thierry Reding <treding at nvidia.com> > ---

On Wed, May 30, 2018 at 02:54:46PM +0200, Thierry Reding wrote: > On Wed, May 30, 2018 at 10:59:30AM +0100, Robin Murphy wrote: > > On 30/05/18 09:03, Thierry Reding wrote: > > > From: Thierry Reding <treding at nvidia.com> > > > > > > Implement this function to enable drivers from detaching from any IOMMU > > > domains that architecture code

From: Thierry Reding <treding at nvidia.com> Depending on the kernel configuration, early ARM architecture setup code may have attached the GPU to a DMA/IOMMU mapping that transparently uses the IOMMU to back the DMA API. Tegra requires special handling for IOMMU backed buffers (a special bit in the GPU's MMU page tables indicates the memory path to take: via the SMMU or directly to the

From: Thierry Reding <treding at nvidia.com> Depending on the kernel configuration, early ARM architecture setup code may have attached the GPU to a DMA/IOMMU mapping that transparently uses the IOMMU to back the DMA API. Tegra requires special handling for IOMMU backed buffers (a special bit in the GPU's MMU page tables indicates the memory path to take: via the SMMU or directly to the

From: Thierry Reding <treding at nvidia.com> An unfortunate interaction between the 32-bit ARM DMA/IOMMU mapping code and Tegra SMMU driver changes to support IOMMU groups introduced a boot- time regression on Tegra124. This was caught very late because none of the standard configurations that are tested on Tegra enable the ARM DMA/ IOMMU mapping code since it is not needed. The reason for

On 30/05/18 14:00, Thierry Reding wrote: > On Wed, May 30, 2018 at 11:30:25AM +0100, Robin Murphy wrote: >> On 30/05/18 09:03, Thierry Reding wrote: >>> From: Thierry Reding <treding at nvidia.com> >>> >>> Depending on the kernel configuration, early ARM architecture setup code >>> may have attached the GPU to a DMA/IOMMU mapping that

On 30/05/18 09:03, Thierry Reding wrote: > From: Thierry Reding <treding at nvidia.com> > > Depending on the kernel configuration, early ARM architecture setup code > may have attached the GPU to a DMA/IOMMU mapping that transparently uses > the IOMMU to back the DMA API. Tegra requires special handling for IOMMU > backed buffers (a special bit in the GPU's MMU page

From: Thierry Reding <treding at nvidia.com> Depending on the kernel configuration, early ARM architecture setup code may have attached the GPU to a DMA/IOMMU mapping that transparently uses the IOMMU to back the DMA API. Tegra requires special handling for IOMMU backed buffers (a special bit in the GPU's MMU page tables indicates the memory path to take: via the SMMU or directly to the

From: Thierry Reding <treding at nvidia.com> Hi, the GPU on Jetson TX2 (GP10B) does not work properly on all devices. Why exactly is not clear, but there are slight differences between the SKUs that were tested. It turns out that the biggest issue is that on some devices (e.g. the one that I have), pulsing the GPU reset twice as is done in the current code (once as part of the power-ungate

Hi Thierry, On 16/09/2019 16:04, Thierry Reding wrote: > From: Thierry Reding <treding at nvidia.com> > > If the GPU is already attached to an IOMMU, don't detach it and setup an > explicit IOMMU domain. Since Nouveau can now properly handle the case of > the DMA API being backed by an IOMMU, just continue using the DMA API. > > Signed-off-by: Thierry Reding

On Wed, May 30, 2018 at 04:06:24PM +0200, Thierry Reding wrote: > From: Thierry Reding <treding at nvidia.com> > > Instead of setting the DMA ops pointer to NULL, set the correct, > non-IOMMU ops depending on the device's coherency setting. > > Signed-off-by: Thierry Reding <treding at nvidia.com> > --- > Changes in v4: > - new patch to fix existing

On Wed, Apr 25, 2018 at 12:10:47PM +0200, Thierry Reding wrote: > From: Thierry Reding <treding at nvidia.com> > > Depending on the kernel configuration, early ARM architecture setup code > may have attached the GPU to a DMA/IOMMU mapping that transparently uses > the IOMMU to back the DMA API. Tegra requires special handling for IOMMU > backed buffers (a special bit in

On 16/09/2019 16:57, Thierry Reding wrote: > On Mon, Sep 16, 2019 at 04:29:18PM +0100, Robin Murphy wrote: >> Hi Thierry, >> >> On 16/09/2019 16:04, Thierry Reding wrote: >>> From: Thierry Reding <treding at nvidia.com> >>> >>> If the GPU is already attached to an IOMMU, don't detach it and setup an >>> explicit IOMMU domain. Since

On 30/05/18 14:12, Thierry Reding wrote: > On Wed, May 30, 2018 at 02:54:46PM +0200, Thierry Reding wrote: >> On Wed, May 30, 2018 at 10:59:30AM +0100, Robin Murphy wrote: >>> On 30/05/18 09:03, Thierry Reding wrote: >>>> From: Thierry Reding <treding at nvidia.com> >>>> >>>> Implement this function to enable drivers from detaching from

On Wed, May 30, 2018 at 10:59:30AM +0100, Robin Murphy wrote: > On 30/05/18 09:03, Thierry Reding wrote: > > From: Thierry Reding <treding at nvidia.com> > > > > Implement this function to enable drivers from detaching from any IOMMU > > domains that architecture code might have attached them to so that they > > can take exclusive control of the IOMMU via

From: Thierry Reding <treding at nvidia.com> Implement this function to enable drivers from detaching from any IOMMU domains that architecture code might have attached them to so that they can take exclusive control of the IOMMU via the IOMMU API. Signed-off-by: Thierry Reding <treding at nvidia.com> --- Changes in v3: - make API 32-bit ARM specific - avoid extra local variable

On 26.04.2018 15:41, Thierry Reding wrote: > On Wed, Apr 25, 2018 at 09:28:49AM -0600, Jordan Crouse wrote: >> On Wed, Apr 25, 2018 at 12:10:47PM +0200, Thierry Reding wrote: >>> From: Thierry Reding <treding at nvidia.com> >>> >>> Depending on the kernel configuration, early ARM architecture setup code >>> may have attached the GPU to a DMA/IOMMU

On Thu, Apr 26, 2018 at 02:11:36PM +0200, Thierry Reding wrote: > On Wed, Apr 25, 2018 at 08:19:34AM -0700, Christoph Hellwig wrote: > > On Wed, Apr 25, 2018 at 12:10:48PM +0200, Thierry Reding wrote: > > > From: Thierry Reding <treding at nvidia.com> > > > > > > The dma_iommu_detach_device() API can be used by drivers to forcibly > > > detach a

From: Thierry Reding <treding at nvidia.com> Hi Ben, here's a revised subset of the patches I had sent out a couple of weeks ago. I've reworked the BAR2 accesses in the way that you had suggested, which at least for GP10B turned out to be fairly trivial to do. I have not looked in detail at this for GV11B yet, but a cursory look showed that BAR2 is accessed in more places, so the

From: Thierry Reding <treding at nvidia.com> Hi Ben, here's a revised subset of the patches I had sent out a couple of weeks ago. I've reworked the BAR2 accesses in the way that you had suggested, which at least for GP10B turned out to be fairly trivial to do. I have not looked in detail at this for GV11B yet, but a cursory look showed that BAR2 is accessed in more places, so the