Displaying 20 results from an estimated 100 matches similar to: "[Bug 106132] New: bar.sync encoding incorrect for GM107"
2015 May 09
5
[PATCH 1/4] nvc0/ir: avoid jumping to a sched instruction
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
Pretty sure there's nothing wrong with it, but it looks odd in the code.
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 2 ++
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 7 +++++--
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 2 ++
3 files changed, 9 insertions(+), 2 deletions(-)
2019 Oct 14
1
[PATCH] gm107/ir: fix loading z offset for layered 3d image bindings
Unfortuantely we don't know if a particular load is a real 2d image (as
would be a cube face or 2d array element), or a layer of a 3d image.
Since we pass in the TIC reference, the instruction's type has to match
what's in the TIC (experimentally). In order to properly support
bindless images, this also can't be done by looking at the current
bindings and generating appropriate
2015 Feb 20
10
[PATCH 01/11] nvc0/ir: add emission of dadd/dmul/dmad opcodes, fix minmax
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
.../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 66 +++++++++++++++++++++-
1 file changed, 63 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index dfb093c..e38a3b8 100644
---
2014 Sep 01
0
[PATCH] nv50/ir: avoid creating instructions that can't be emitted
When constant folding a MAD operation, we first fold the multiply and
generate an ADD. However we do so without making sure that the immediate
can be handled in the saturate case. If it can't, load the immediate in
a separate instruction.
Reported-by: Tiziano Bacocco <tizbac2 at gmail.com>
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.2 10.3"
2017 Apr 03
0
[PATCH v2 1/3] nv50/ir: fix AlgebraicOpt for slcts with mods
Signed-off-by: Karol Herbst <karolherbst at gmail.com>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 4c92a1efb5..bd60a84998 100644
---
2015 Aug 19
5
[PATCH 1/2] nvc0/ir: detect AND/SHR pairs and convert into EXTBF
Some shaders appear to extract bits using shift/and combos. Detect
(some) of those and convert to EXTBF instead.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
.../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 66 +++++++++++++++-------
1 file changed, 46 insertions(+), 20 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
2017 Jun 20
2
trash can feature, crashed???
All,
I currently have 2 bricks running Gluster 3.10.1. This is a Centos
installation. On Friday last week, I enabled the trashcan feature on one of
my volumes:
gluster volume set date01 features.trash on
I also limited the max file size to 500MB:
gluster volume set data01 features.trash-max-filesize 500MB
3 hours after that I enabled this, this specific gluster volume went down:
[2017-06-16
2015 Nov 05
7
[PATCH mesa 0/5] nouveau: codegen: Make use of double immediates
Hi All,
This series implements using double immediates in the nouveau codegen code.
This turns the following (nvc0) code:
1: mov u32 $r2 0x00000000 (8)
2: mov u32 $r3 0x3fe00000 (8)
3: add f64 $r0d $r0d $r2d (8)
Into:
1: add f64 $r0d $r0d 0.500000 (8)
This has been tested with the 2 double shader tests which I just send to
the piglet list. On a gk208 (gk110 / SM35)
2017 Jun 20
0
trash can feature, crashed???
On Tue, 2017-06-20 at 08:52 -0400, Ludwig Gamache wrote:
> All,
>
> I currently have 2 bricks running Gluster 3.10.1. This is a Centos installation. On Friday last
> week, I enabled the trashcan feature on one of my volumes:
> gluster volume set date01 features.trash on
I think you misspelled the volume name. Is it data01 or date01?
> I also limited the max file size to 500MB:
2014 Sep 26
0
[PATCH] gm107/ir: take relative pfetch offset into account
There is no dedicated instruction for this, so just combine it with the
constant offset.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.3" <mesa-stable at lists.freedesktop.org>
---
This fixes the spec/glsl-1.50/execution/geometry/dynamic_input_array_index
piglit test.
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp | 5 ++++-
1 file changed,
2015 Jan 25
1
[PATCH] fuse/gm107: simplify the return logic
Spotted by coccinelle:
drivers/gpu/drm/nouveau/core/subdev/fuse/gm107.c:50:5-8: WARNING: end returns can be simpified
Signed-off-by: Martin Peres <martin.peres at free.fr>
---
drm/nouveau/nvkm/subdev/fuse/gm107.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drm/nouveau/nvkm/subdev/fuse/gm107.c b/drm/nouveau/nvkm/subdev/fuse/gm107.c
index ba19158..0b256aa 100644
2015 Mar 20
0
VBO flush method on Maxwell (GM107)
Hello,
The method we previously used on Fermi and Kepler (0x142c) to flush
the VBO cache before draw appears to be gone on Maxwell. Is there a
replacement method we should use?
(Or perhaps that method was never meant for VBO cache flush and
instead flushed something related to the vertex quarantine area
defined by 0x17bc/0x17c0/0x17c4, which in turn is gone on Maxwell?)
Thanks for any light you
2016 Jan 15
0
[PATCH] ltc/gm107: wait on relevant bit in gm107_ltc_cbc_wait
Patch "ltc/gm107: use nvkm_mask to set cbc_ctrl1" sets the 3rd bit
of the CTRL1 register instead of writing it entirely in
gm107_ltc_cbc_clear(). As a counterpart, gm107_ltc_cbc_wait() must also
be modified to wait on that single bit only, otherwise a timeout may
occur if some other bit of that register is set. This happened at least
on GM206 when running glmark2-drm.
While we are at
2016 Mar 04
0
[PATCH 1/2] fb/gm107: maxwell memory reclocking looks like kepler
Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
---
drm/nouveau/nvkm/subdev/fb/gm107.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drm/nouveau/nvkm/subdev/fb/gm107.c b/drm/nouveau/nvkm/subdev/fb/gm107.c
index 2a91df8..9cc7e61 100644
--- a/drm/nouveau/nvkm/subdev/fb/gm107.c
+++ b/drm/nouveau/nvkm/subdev/fb/gm107.c
@@ -29,7 +29,7 @@ gm107_fb = {
.dtor =
2016 Aug 29
0
[PATCH] drm/nouveau/gr/gm107: mark symbols static where possible
We get 1 warning when build kernel with W=1:
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c:312:1: warning: no previous prototype for 'gm107_gr_init' [-Wmissing-prototypes]
In fact, this function is only used in the file in which it is
declared and don't need a declaration, but can be made static.
so this patch marks this function with 'static'.
Signed-off-by: Baoyou Xie
2016 Oct 22
1
[Bug 98391] New: [GM107] priv: HUB0: 614900 00800000 (1d408200)
https://bugs.freedesktop.org/show_bug.cgi?id=98391
Bug ID: 98391
Summary: [GM107] priv: HUB0: 614900 00800000 (1d408200)
Product: xorg
Version: unspecified
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity: normal
Priority: medium
Component: Driver/nouveau
2017 Oct 23
1
[Bug 103409] New: [GM107] reboot/suspend/lspci hang with nouveau
https://bugs.freedesktop.org/show_bug.cgi?id=103409
Bug ID: 103409
Summary: [GM107] reboot/suspend/lspci hang with nouveau
Product: Mesa
Version: 17.2
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity: normal
Priority: medium
Component: Drivers/DRI/nouveau
2018 May 26
1
[Bug 106662] New: nouveau DPMS poblem with DRI3 (GM107)
https://bugs.freedesktop.org/show_bug.cgi?id=106662
Bug ID: 106662
Summary: nouveau DPMS poblem with DRI3 (GM107)
Product: Mesa
Version: unspecified
Hardware: Other
OS: All
Status: NEW
Severity: normal
Priority: medium
Component: Drivers/DRI/nouveau
Assignee: nouveau at
2018 Nov 12
1
Question on IPA on GM107
So I'm trying to track an special value in IPA instruction generation.
https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp#L2561
Register on 0x14 (20) is set to some source on "insn->op == OP_PINTERP"
I have found while emulation that such value can be set sometimes to
FragCoord.w, I don't however know what that value is and
2017 Nov 30
2
Problems joining new gluster 3.10 nodes to existing 3.8
Hi,
I have a problem joining four Gluster 3.10 nodes to an existing
Gluster 3.8 nodes. My understanding that this should work and not be
too much of a problem.
Peer robe is successful but the node is rejected:
gluster> peer detach elkpinfglt07
peer detach: success
gluster> peer probe elkpinfglt07
peer probe: success.
gluster> peer status
Number of Peers: 6
Hostname: elkpinfglt02