similar to: [PATCH] nvc0: fix handling of inverted render condition

Displaying 20 results from an estimated 100 matches similar to: "[PATCH] nvc0: fix handling of inverted render condition"

2016 Jun 05
0
[RFC PATCH] nouveau: add locking
--- This is still a WIP. Just wanted to get people's opinions. It's also not bullet-proof. Unfortunately nouveau_bo_wait [which is in turn called by nouveau_bo_map] can trigger a kick, so technically we have to have a lock around any nouveau_bo_map. My strategy here was to add locks around all the user-accessible APIs while leaving all the internal stuff unlocked. When waiting for a
2015 Nov 26
9
[mesa 1/9] nouveau: bump required libdrm version to 2.4.66
From: Ben Skeggs <bskeggs at redhat.com> Signed-off-by: Ben Skeggs <bskeggs at redhat.com> --- configure.ac | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure.ac b/configure.ac index 4016871..c02ee61 100644 --- a/configure.ac +++ b/configure.ac @@ -73,7 +73,7 @@ LIBDRM_RADEON_REQUIRED=2.4.56 LIBDRM_AMDGPU_REQUIRED=2.4.63 LIBDRM_INTEL_REQUIRED=2.4.61
2015 Dec 16
11
[mesa v3 1/9] nouveau: bump required libdrm version to 2.4.66
From: Ben Skeggs <bskeggs at redhat.com> v2. forgot bump for non-gallium driver Signed-off-by: Ben Skeggs <bskeggs at redhat.com> --- configure.ac | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configure.ac b/configure.ac index b6680d0..965c6f7 100644 --- a/configure.ac +++ b/configure.ac @@ -72,8 +72,8 @@ LIBDRM_REQUIRED=2.4.60
2015 Nov 27
13
[mesa v2 1/9] nouveau: bump required libdrm version to 2.4.66
From: Ben Skeggs <bskeggs at redhat.com> Signed-off-by: Ben Skeggs <bskeggs at redhat.com> --- configure.ac | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure.ac b/configure.ac index 4016871..c02ee61 100644 --- a/configure.ac +++ b/configure.ac @@ -73,7 +73,7 @@ LIBDRM_RADEON_REQUIRED=2.4.56 LIBDRM_AMDGPU_REQUIRED=2.4.63 LIBDRM_INTEL_REQUIRED=2.4.61
2014 Jun 17
0
[PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
nv30 seems to not support dma objects with offset, so simply extend the query_heap to cover the entire notifier, and use a offset in nv30_context_kick_notify. Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- src/gallium/drivers/nouveau/nouveau_buffer.c | 14 +- src/gallium/drivers/nouveau/nouveau_context.h | 5 +
2014 Jun 17
2
[PATCH try 2 1/2] gallium/nouveau: decouple nouveau_fence implementation from screen
Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++------------- src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++-- src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++ src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++--- src/gallium/drivers/nouveau/nv30/nv30_context.c | 4 +-
2014 Jun 21
3
[Mesa-dev] [PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
On Tue, Jun 17, 2014 at 2:34 AM, Maarten Lankhorst <maarten.lankhorst at canonical.com> wrote: > nv30 seems to not support dma objects with offset, so simply extend the query_heap to cover the > entire notifier, and use a offset in nv30_context_kick_notify. It would be great if you could detail the list of transformations that were done in the commit description, as well as what the
2014 Jun 16
2
[PATCH 1/2] gallium/nouveau: decouple nouveau_fence implementation from screen
Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++------------- src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++-- src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++ src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++--- src/gallium/drivers/nouveau/nv30/nv30_context.c | 4
2017 Dec 20
2
[PATCH] gm107/ir: use lane 0 for manual textureGrad handling
This is parallel to the pre-SM50 change which does this. Adjusts the shuffles / quadops to make the values correct relative to lane 0, and then splat the results to all lanes for the final move into the target register. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Entirely untested beyond compilation. Should check bin/tex-miplevel-selection textureGrad Cube
2016 Oct 16
10
[PATCH 1/5] hwdefs: update nvc0_3d, add gm107_texture for new TIC format
These are copied directly from the mesa repository. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/hwdefs/gm107_texture.xml.h | 365 +++++++++++++++++ src/hwdefs/nvc0_3d.xml.h | 867 +++++++++++++++++++++++++---------------- 2 files changed, 892 insertions(+), 340 deletions(-) create mode 100644 src/hwdefs/gm107_texture.xml.h diff --git
2017 Dec 20
0
[PATCH] gm107/ir: use lane 0 for manual textureGrad handling
On Tue, Dec 19, 2017 at 11:41 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: > This is parallel to the pre-SM50 change which does this. Adjusts the > shuffles / quadops to make the values correct relative to lane 0, and > then splat the results to all lanes for the final move into the target > register. > > Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> >
2014 Dec 31
0
[PATCH 2/2] nvc0: regenerate rnndb headers
The headers hadn't been regenerated in a long time and had seen a number of manual modifications. A few changes: - remove nvc0_2d entirely, use the nv50 header which has the nvc0 values too - remove 3ddefs, it's identical to the nv50 file - move macros out into a separate file Also the upstream rnndb changed the overall chip naming convention; this was fixed up manually in the
2008 Feb 23
0
Update from 1.0.10 -> 1.1rc1 Inverted quota warning values?
I used 1.0.10 with the quota-rewrite patch for v1.0. With that, I configured: quota_warning = storage=10%% /usr/local/scripts/quota-warning 90 quota_warning2 = storage=5%% /usr/local/scripts/quota-warning 95 quota_warning3 = storage=1%% /usr/local/scripts/quota-warning 99 with 1.1, the logic for the quota_warning entries changed (http://wiki.dovecot.org/Quota/New): quota_warning =
2003 Mar 04
0
[Bug 23] Various extension matches have problems when restoring '!' inverted parameters
https://bugzilla.netfilter.org/cgi-bin/bugzilla/show_bug.cgi?id=23 ------- Additional Comments From laforge@netfilter.org 2003-03-04 23:41 ------- Created an attachment (id=10) proposed fix for the hh_len(iif) > hh_len(oif) case of ipt_REJECT sending tcp RST ------- Additional Comments From laforge@netfilter.org 2003-03-04 23:45 ------- the attachment was for bug #22, sorry. -------
2003 Oct 08
0
[Bug 23] Various extension matches have problems when restoring '!' inverted parameters
https://bugzilla.netfilter.org/cgi-bin/bugzilla/show_bug.cgi?id=23 laforge@netfilter.org changed: What |Removed |Added ---------------------------------------------------------------------------- Status|ASSIGNED |RESOLVED Resolution| |FIXED ------- Additional Comments From
2016 Oct 25
1
[Bug 1094] New: Inverted labels with xml option
https://bugzilla.netfilter.org/show_bug.cgi?id=1094 Bug ID: 1094 Summary: Inverted labels with xml option Product: nfacct Version: unspecified Hardware: x86_64 OS: Debian GNU/Linux Status: NEW Severity: trivial Priority: P5 Component: nfacct Assignee: pablo at netfilter.org
2012 Feb 05
1
Simulating from a Normal Inverted Wishart distribution
Hello everyone I was wondering how would one simulate from a Normal Wishart Distribution in R. A normal inverted Wishart distribution is denoted by NIW (M,C,d,S), where X/(Sigma) ~ N( M,C,(Sigma) ) -> a matrix normal distribution, (Sigma) -> column dispersion matrix (Sigma) ~ IW (d,S) -> inverted Wishart distribution Thanks a lot ! Best Shantanu [[alternative HTML version
2007 Sep 08
2
everquest and an inverted screen
I am trying to get the original Everquest up and running on the latest wine. I have it installed and the patcher runs just fine, and can launch into the game. However, from the character select screen on, the graphic screen is inverted (ie, upside down). Since this is the first time I have tried anything with wine, and literally I put the CD in, had wine install it and then ran it (OK, so I
2013 Feb 17
5
[Bug 60993] New: Double-inverted picture (but letters just upside-down)
https://bugs.freedesktop.org/show_bug.cgi?id=60993 Priority: medium Bug ID: 60993 Assignee: nouveau at lists.freedesktop.org Summary: Double-inverted picture (but letters just upside-down) QA Contact: xorg-team at lists.x.org Severity: normal Classification: Unclassified OS: Linux (All) Reporter: qwrules at
2010 May 26
1
[LLVMdev] How to handle predicate registers which can also work inverted way.
In our architecture (TCE) we have predicate registers, not flags. But our predicates work in a way that in the predicated instruction do not contain only the predicate register, but a predicate register and boolean value pair, the boolean value stating if the instruction is to be executed only if the register is true(normal behavior of predicate regs) or only if the predicate reg is