similar to: [bug report] drm/nouveau/secboot/gm20b: add secure boot support

We accidentally set "psb" which is a no-op instead of "*psb" so it generates a static checker warning. We should probably set it before the first error return so that it's always initialized. Fixes: 923f1bd27bf1 ("drm/nouveau/secboot/gm20b: add secure boot support") Signed-off-by: Dan Carpenter <dan.carpenter at oracle.com> --- Static analysis. I'm

From: Dan Carpenter <dan.carpenter at oracle.com> [ Upstream commit 3613a9bea95a1470dd42e4ed1cc7d86ebe0a2dc0 ] We accidentally set "psb" which is a no-op instead of "*psb" so it generates a static checker warning. We should probably set it before the first error return so that it's always initialized. Fixes: 923f1bd27bf1 ("drm/nouveau/secboot/gm20b: add

From: Dan Carpenter <dan.carpenter at oracle.com> [ Upstream commit 3613a9bea95a1470dd42e4ed1cc7d86ebe0a2dc0 ] We accidentally set "psb" which is a no-op instead of "*psb" so it generates a static checker warning. We should probably set it before the first error return so that it's always initialized. Fixes: 923f1bd27bf1 ("drm/nouveau/secboot/gm20b: add

From: Dan Carpenter <dan.carpenter at oracle.com> [ Upstream commit 3613a9bea95a1470dd42e4ed1cc7d86ebe0a2dc0 ] We accidentally set "psb" which is a no-op instead of "*psb" so it generates a static checker warning. We should probably set it before the first error return so that it's always initialized. Fixes: 923f1bd27bf1 ("drm/nouveau/secboot/gm20b: add

From: Dan Carpenter <dan.carpenter at oracle.com> [ Upstream commit 3613a9bea95a1470dd42e4ed1cc7d86ebe0a2dc0 ] We accidentally set "psb" which is a no-op instead of "*psb" so it generates a static checker warning. We should probably set it before the first error return so that it's always initialized. Fixes: 923f1bd27bf1 ("drm/nouveau/secboot/gm20b: add

Secure firmwares provided by NVIDIA will follow the same overall principle, but may slightly differ in format, or not use the same bootloader descriptor even on the same chip. In order to handle this as gracefully as possible, turn the LS firmware functions into hooks that can be overloaded as needed. The current hooks cover the external firmware loading as well as the bootloader descriptor

If 'ioremap()' returns 0, 'gm20b_tegra_read_wpr()' will return 0 as well, which means success. Return -ENOMEM instead Signed-off-by: Christophe JAILLET <christophe.jaillet at wanadoo.fr> --- Not sure that -ENOMEM is the best value. I've taken it because it is often used in such a case. --- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c | 2 +- 1 file changed, 1

This hook can be removed if the function writing the HS descriptor is aware of WPR settings. Let's do that as it allows us to make the ACR descriptor structure private and save some code. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/gm200.c | 95 ++++++++++++++++++++++++--------- drm/nouveau/nvkm/subdev/secboot/gm20b.c | 11 ----

From: Thierry Reding <treding at nvidia.com> The GPUs found on Tegra SoCs have registers that can be used to read the WPR configuration. Use these registers instead of reaching into the memory controller's register space to read the same information. Signed-off-by: Thierry Reding <treding at nvidia.com> --- .../drm/nouveau/nvkm/subdev/secboot/gm200.h | 2 +-

From: Wei Yongjun <weiyongjun1 at huawei.com> The error return code PTR_ERR(mc) is always 0 since mc is equal to 0 in this error handling case. Signed-off-by: Wei Yongjun <weiyongjun1 at huawei.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c

On Tue, Sep 17, 2019 at 01:49:57PM +1000, Ben Skeggs wrote: > On Tue, 17 Sep 2019 at 01:04, Thierry Reding <thierry.reding at gmail.com> wrote: > > > > From: Thierry Reding <treding at nvidia.com> > > > > The GPUs found on Tegra SoCs have registers that can be used to read the > > WPR configuration. Use these registers instead of reaching into the >

Use the HS hook to completely generate the HS BL descriptor, similarly to what is done in the LS hook, instead of (arbitrarily) using the acr_v1 format as an intermediate. This allows us to make the bootloader descriptor structures private to each implementation, resulting in a cleaner an more consistent design. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> ---

Add secure-boot for the dGPU set of GM20X chips, using the PMU as the high-secure falcon. This work is based on Deepak Goyal's initial port of Secure Boot to Nouveau. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/include/nvkm/subdev/secboot.h | 2 + drm/nouveau/nvkm/engine/device/base.c | 2 + drm/nouveau/nvkm/engine/gr/gm200.c | 8 +-

On Tue, 17 Sep 2019 at 01:04, Thierry Reding <thierry.reding at gmail.com> wrote: > > From: Thierry Reding <treding at nvidia.com> > > The GPUs found on Tegra SoCs have registers that can be used to read the > WPR configuration. Use these registers instead of reaching into the > memory controller's register space to read the same information. > >

This allows to have the related MODULE_FIRMWARE tag only on relevant arch (arm64). This will saves about 400k on initramfs when not relevant Signed-off-by: Nicolas Chauvet <kwizart at gmail.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c | 2 ++ drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp10b.c | 2 ++ 2 files changed, 4 insertions(+) diff --git

On Sun, Jun 10, 2018 at 01:01:31PM +0200, Nicolas Chauvet wrote: > This allows to have the related MODULE_FIRMWARE tag only > on relevant arch (arm64). > This will saves about 400k on initramfs when not relevant > > Signed-off-by: Nicolas Chauvet <kwizart at gmail.com> > --- > drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c | 2 ++ >

2018-06-11 10:33 GMT+02:00 Thierry Reding <thierry.reding at gmail.com>: > On Sun, Jun 10, 2018 at 01:01:31PM +0200, Nicolas Chauvet wrote: >> This allows to have the related MODULE_FIRMWARE tag only >> on relevant arch (arm64). >> This will saves about 400k on initramfs when not relevant >> >> Signed-off-by: Nicolas Chauvet <kwizart at gmail.com>

This is a highly changed revision of the first patch series that adds secure boot support to Nouveau. This code still depends on NVIDIA releasing official firmware files, but the files released with SHIELD TV and Pixel C can already be used on a Jetson TX1. As you know we are working hard to release the official firmware files, however in the meantime it doesn't hurt to review the code so it

This is needed for using Nouveaus PMU image after performing secboot. This will be helpfull for Maxwell2 reclocking on boards without externally controlled fans like on most laptops or fanless boards. Signed-off-by: Karol Herbst <karolherbst at gmail.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git

On 07/05/2017 03:35 AM, Karol Herbst wrote: > This is needed for using Nouveaus PMU image after performing secboot. This will > be helpfull for Maxwell2 reclocking on boards without externally controlled > fans like on most laptops or fanless boards. I get the idea in principal, but have some concerns: - Does this screw up re-running secboot during channel recovery (ie. page fault on