similar to: [PATCH] bios/perf: Correctly parse PCIe speeds for ver 0x40

Displaying 20 results from an estimated 500 matches similar to: "[PATCH] bios/perf: Correctly parse PCIe speeds for ver 0x40"

2017 Apr 06
0
[PATCH v2] bios/perf: Parse PCIe speeds correctly for ver 0x40
v2: 0x21 also means 2.5 GT/s Signed-off-by: Karol Herbst <karolherbst at gmail.com> --- drm/nouveau/nvkm/subdev/bios/perf.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/bios/perf.c b/drm/nouveau/nvkm/subdev/bios/perf.c index c3068358..3bbb7fed 100644 --- a/drm/nouveau/nvkm/subdev/bios/perf.c +++
2015 Oct 13
12
[PATCH v2 0/9] PCIEs speed change
overall the same as the old stuff, but with better namings and tirivialy improved code here and there Karol Herbst (9): pci: add gk104 variant pci: add gf106 variant pci: implement generic code for PCIe speed change pci: implement pcie speed change for tesla pci: implement pcie speed change on Fermi pci: implement PCIe speed change for kepler+ bios/perf: parse the pci speed from the
2016 Jan 01
9
[PATCH v4 0/9] PCIe speed changes
overall it is for the most part the same as my older version. I cleaned up some copyright things, so that it is more like the others. Also I moved the print about the max speed supported into preinit and did some other minor cleanups in the 3rd commit. Happy testing (and performance for prime offloading setups) Karol Herbst (9): pci: add gk104 variant pci: add gf106 variant pci: implement
2015 Oct 12
12
[PATCH 0/9] PCIe speed changes
this patch series implements PCIe speed changes for Tesla and newer. The Kepler and Fermi bits are tested on my cards at home. Karol Herbst (9): pci: add gk104 variant pci: add gf106 variant pci: implement generic code for PCIe speed change pci: implement pcie speed change for tesla pci: implement pcie speed change on Fermi pci: implement PCIe speed change for kepler+ bios/perf:
2019 Sep 13
0
[PATCH v4 3/4] pci: set the pcie link speed to 8.0 when suspending
Apperantly things go south if we suspend the device with a PCIe link speed set to 2.5. Fixes runtime suspend on my gp107. This all looks like some bug inside the pci subsystem and I would prefer a fix there instead of nouveau, but maybe there is no real nice way of doing that outside of drivers? v2: squashed together patch 4 and 5 v3: only restore pcie speed on machines with runpm add
2019 Sep 17
0
[PATCH v4 3/4] pci: set the pcie link speed to 8.0 when suspending
On Tue, Sep 17, 2019 at 8:01 AM Ben Skeggs <skeggsb at gmail.com> wrote: > > On Fri, 13 Sep 2019 at 21:33, Karol Herbst <kherbst at redhat.com> wrote: > > > > Apperantly things go south if we suspend the device with a PCIe link speed > > set to 2.5. Fixes runtime suspend on my gp107. > > > > This all looks like some bug inside the pci subsystem and I
2019 Sep 17
0
[PATCH v4 3/4] pci: set the pcie link speed to 8.0 when suspending
On Tue, Sep 17, 2019 at 10:21 AM Ben Skeggs <skeggsb at gmail.com> wrote: > > On Tue, 17 Sep 2019 at 18:07, Karol Herbst <kherbst at redhat.com> wrote: > > > > On Tue, Sep 17, 2019 at 8:01 AM Ben Skeggs <skeggsb at gmail.com> wrote: > > > > > > On Fri, 13 Sep 2019 at 21:33, Karol Herbst <kherbst at redhat.com> wrote: > > > >
2019 Sep 17
2
[PATCH v4 3/4] pci: set the pcie link speed to 8.0 when suspending
On Fri, 13 Sep 2019 at 21:33, Karol Herbst <kherbst at redhat.com> wrote: > > Apperantly things go south if we suspend the device with a PCIe link speed > set to 2.5. Fixes runtime suspend on my gp107. > > This all looks like some bug inside the pci subsystem and I would prefer a > fix there instead of nouveau, but maybe there is no real nice way of doing > that outside
2019 Sep 17
2
[PATCH v4 3/4] pci: set the pcie link speed to 8.0 when suspending
On Tue, 17 Sep 2019 at 18:07, Karol Herbst <kherbst at redhat.com> wrote: > > On Tue, Sep 17, 2019 at 8:01 AM Ben Skeggs <skeggsb at gmail.com> wrote: > > > > On Fri, 13 Sep 2019 at 21:33, Karol Herbst <kherbst at redhat.com> wrote: > > > > > > Apperantly things go south if we suspend the device with a PCIe link speed > > > set to 2.5.
2016 Apr 18
0
[PATCH v4 29/37] clk: we should pass the pstate id around not the index in the list
this makes the code easier, because we can compare the id with pstate->pstate and safe us the trouble iterating over the entire pstate list Signed-off-by: Karol Herbst <nouveau at karolherbst.de> --- drm/nouveau/nouveau_debugfs.c | 6 ++--- drm/nouveau/nvkm/subdev/clk/base.c | 49 +++++++++++--------------------------- 2 files changed, 17 insertions(+), 38 deletions(-) diff --git
2018 Jul 27
0
[PATCH] pci/gp100: Enable changing pcie link speeds
this code is pretty usefull for now as nothing triggers it, but the link speed can be changed with a "gk104_pcie_set_link(pci, NVKM_PCIE_SPEED_8_0, 16);" as the last call inside gk104_pcie_init. In the future this should be helpful when using reverse prime with high resolutions on Pascal GPUs. I still need to verify this with a mmiotrace and do more testing, but everybody suffering
2020 Jul 08
0
[PATCH][next] drm/nouveau: Use fallthrough pseudo-keyword
On Wed, 8 Jul 2020 at 03:31, Gustavo A. R. Silva <gustavoars at kernel.org> wrote: > > Replace the existing /* fall through */ comments and its variants with > the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary > fall-through markings when it is the case. I really like this! I was not a fan of explicitly marking those with comments. Thank you, taken in my
2018 Jun 27
0
[PATCH] drm/nouveau/nvkm: mark expected switch fall-throughs
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Signed-off-by: Gustavo A. R. Silva <gustavo at embeddedor.com> --- drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmi.c | 17 +++++++++++++++++ drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.c | 1 + drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c | 2 ++
2017 Mar 05
0
[PATCH 5/9] clk: We should pass the pstate id around not the index in the list
This makes the code easier, because we can compare the id with pstate->pstate and safe us the trouble iterating over the entire pstate list to match the index. Signed-off-by: Karol Herbst <karolherbst at gmail.com> Reviewed-by: Martin Peres <martin.peres at free.fr> --- drm/nouveau/nouveau_debugfs.c | 6 +-- drm/nouveau/nvkm/subdev/clk/base.c | 78
2017 Sep 15
0
[RFC PATCH 08/29] clk: We should pass the pstate id around not the index in the list
This makes the code easier, because we can compare the id with pstate->pstate and saves us from the trouble of iterating over the pstates to match the index. v2: reword commit message Signed-off-by: Karol Herbst <karolherbst at gmail.com> Reviewed-by: Martin Peres <martin.peres at free.fr> --- drm/nouveau/nouveau_debugfs.c | 6 +-- drm/nouveau/nvkm/subdev/clk/base.c | 78
2016 Apr 18
0
[PATCH v4 27/37] clk: make pstate a pointer to nvkm_pstate
we will access the current set cstate at least every second and this safes us some CPU cycles looking them up every second. Signed-off-by: Karol Herbst <nouveau at karolherbst.de> --- drm/nouveau/include/nvkm/subdev/clk.h | 2 +- drm/nouveau/nvkm/engine/device/ctrl.c | 5 ++++- drm/nouveau/nvkm/subdev/clk/base.c | 12 ++++++++---- drm/nouveau/nvkm/subdev/pmu/gk20a.c | 23
2019 Jan 10
0
[PATCH] drm/nouveau/nvkm: mark expected switch fall-throughs
Hi, Friendly ping: Who can take this? Thanks -- Gustavo On 10/17/18 9:28 AM, Gustavo A. R. Silva wrote: > In preparation to enabling -Wimplicit-fallthrough, mark switch cases > where we are expecting to fall through. > > This patch aims to suppress 29 missing-break-in-switch false positives. > > Addresses-Coverity-ID: 1456891 ("Missing break in switch") >
2016 Apr 20
0
[PATCH v4 27/37] clk: make pstate a pointer to nvkm_pstate
2016-04-20 20:53 GMT+00:00 Martin Peres <martin.peres at free.fr>: > On 18/04/16 22:14, Karol Herbst wrote: >> >> we will access the current set cstate at least every second and this safes >> us > > saves >> >> some CPU cycles looking them up every second. >> >> Signed-off-by: Karol Herbst <nouveau at karolherbst.de> >> ---
2016 Apr 18
0
[PATCH v4 22/37] clk: rename nvkm_pstate_calc to nvkm_clk_update
this function will be used to update the current clock state. This will happen for various reasons: * temperature changes (may change cstate and/or voltage) * user changes boost mode * load changes v2: add wait parameter Signed-off-by: Karol Herbst <nouveau at karolherbst.de> --- drm/nouveau/include/nvkm/subdev/clk.h | 1 + drm/nouveau/nvkm/subdev/clk/base.c | 46
2017 Mar 05
0
[PATCH 3/9] clk: Make pstate a pointer to nvkm_pstate
We will access the current set cstate at least every second and this safes us some CPU cycles looking them up every second. Signed-off-by: Karol Herbst <karolherbst at gmail.com> Reviewed-by: Martin Peres <martin.peres at free.fr> --- drm/nouveau/include/nvkm/subdev/clk.h | 4 +++- drm/nouveau/nvkm/engine/device/ctrl.c | 5 ++++- drm/nouveau/nvkm/subdev/clk/base.c | 17