similar to: [PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD

Displaying 20 results from an estimated 700 matches similar to: "[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD"

2016 Oct 02
2
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
On 02.10.2016 20:03, Ilia Mirkin wrote: > On Sun, Oct 2, 2016 at 1:58 PM, Tobias Klausmann > <tobias.johannes.klausmann at mni.thm.de> wrote: >> Previously we'd end up with an unnecessary mov for the thirs immediate value. >> >> total instructions in shared programs : 851881 -> 851864 (-0.00%) >> total gprs used in shared programs : 110295 -> 110295
2016 Oct 02
0
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
That's very odd. LoadPropagation should have picked that up even in its current form. Should try to figure out why it didn't and that is likely to "fix" a *lot* more situations. On Sun, Oct 2, 2016 at 2:24 PM, Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> wrote: > > > On 02.10.2016 20:03, Ilia Mirkin wrote: >> >> On Sun, Oct 2, 2016 at
2016 Oct 02
1
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
On 02.10.2016 20:26, Ilia Mirkin wrote: > That's very odd. LoadPropagation should have picked that up even in > its current form. Should try to figure out why it didn't and that is > likely to "fix" a *lot* more situations. Actually i was coming from an, given really constrained, addition to the LoadPropagation pass, where i was told to fix it within OP_MAD :/ > On
2016 Oct 02
0
[PATCH] nv50/ir: Propagate third immediate src when folding OP_MAD
On Sun, Oct 2, 2016 at 1:58 PM, Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> wrote: > Previously we'd end up with an unnecessary mov for the thirs immediate value. > > total instructions in shared programs : 851881 -> 851864 (-0.00%) > total gprs used in shared programs : 110295 -> 110295 (0.00%) > total local used in shared programs : 1020 ->
2017 Apr 29
5
[PATCH v2] nv50/ir: optimize shl(a, 0) to a
helps two alien isolation shaders shader-db: total instructions in shared programs : 4251497 -> 4251494 (-0.00%) total gprs used in shared programs : 513962 -> 513962 (0.00%) total local used in shared programs : 29797 -> 29797 (0.00%) total bytes used in shared programs : 38960264 -> 38960232 (-0.00%) local gpr inst bytes helped
2015 Aug 19
5
[PATCH 1/2] nvc0/ir: detect AND/SHR pairs and convert into EXTBF
Some shaders appear to extract bits using shift/and combos. Detect (some) of those and convert to EXTBF instead. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 66 +++++++++++++++------- 1 file changed, 46 insertions(+), 20 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
2010 Jun 15
2
[LLVMdev] Question on X86 backend
Hi Micah, > In X86InstrInfo.td for Call Instructions, it mentions that Uses for > argument registers are added manually. Can someone point me to the > location where they are added as the comment doesn't reference a > where or how? the register uses are added by the function X86TargetLowering::LowerCall() during the DAG Lowering phase. This is the relevant code segment: // Add
2017 Apr 29
3
[PATCH] nv50/ir: optimmize shl(a, 0) to a
helps two alien isolation shaders shader-db: total instructions in shared programs : 4251497 -> 4251494 (-0.00%) total gprs used in shared programs : 513962 -> 513962 (0.00%) total local used in shared programs : 29797 -> 29797 (0.00%) total bytes used in shared programs : 38960264 -> 38960232 (-0.00%) local gpr inst bytes helped
2014 Jun 03
8
[PATCH v2 0/4] Constant folding of new Instructions
And another try for constant folding of Instructions for nvc0. Please Review this! Thanks, Tobias Klausmann Tobias Klausmann (4): nvc0/ir: clear subop when folding constant expressions nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant expressions nvc0/ir: Handle OP_BFIND when folding constant expressions nvc0/ir: Handle OP_POPCNT when folding constant expressions
2014 Jun 03
6
[PATCH v3 0/4] Constant folding of new Instructions
Yet another try for constant folding of Instructions for nvc0. Please Review this again! (Hopefully the last time ;-) ) Tobias Klausmann (4): nvc0/ir: clear subop when folding constant expressions nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant expressions nvc0/ir: Handle OP_BFIND when folding constant expressions nvc0/ir: Handle OP_POPCNT when folding constant
2015 Nov 05
7
[PATCH mesa 0/5] nouveau: codegen: Make use of double immediates
Hi All, This series implements using double immediates in the nouveau codegen code. This turns the following (nvc0) code: 1: mov u32 $r2 0x00000000 (8) 2: mov u32 $r3 0x3fe00000 (8) 3: add f64 $r0d $r0d $r2d (8) Into: 1: add f64 $r0d $r0d 0.500000 (8) This has been tested with the 2 double shader tests which I just send to the piglet list. On a gk208 (gk110 / SM35)
2014 May 18
1
[PATCH 1/2] nv50/ir: fix s32 x s32 -> high s32 multiply logic
Retrieving the high 32 bits of a signed multiply is rather annoying. It appears that the simplest way to do this is to compute the absolute value of the arguments, and perform a u32 x u32 -> u64 operation. If the arguments' signs differ, then negate the result. Since there is no u64 support in the cvt instruction, we have the perform the 2's complement negation "by hand".
2015 Jan 09
3
[RESEND/PATCH] nv50/ir: Handle OP_CVT when folding constant expressions
Folding for conversions: F32->(U{16/32}, S{16/32}) and (U{16/32}, {S16/32})->F32 Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 109 +++++++++++++++++++++ 1 file changed, 109 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
2015 Jan 10
2
[PATCH v2] nv50/ir: Handle OP_CVT when folding constant expressions
Folding for conversions: F32->(U{16/32}, S{16/32}) and (U{16/32}, {S16/32})->F32 Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- V2: beat me, whip me, split out F64 .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 81 ++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
2015 Jan 11
2
[PATCH v2] nv50/ir: Handle OP_CVT when folding constant expressions
On 11.01.2015 20:57, Ilia Mirkin wrote: > On Sun, Jan 11, 2015 at 2:56 PM, Tobias Klausmann > <tobias.johannes.klausmann at mni.thm.de> wrote: >> >> On 11.01.2015 20:19, Ilia Mirkin wrote: >>> On Sun, Jan 11, 2015 at 12:27 PM, Tobias Klausmann >>> <tobias.johannes.klausmann at mni.thm.de> wrote: >>>> >>>> On 11.01.2015 01:58,
2015 Jan 11
2
[PATCH] nv50/ir: Handle OP_CVT when folding constant expressions
On Sun, Jan 11, 2015 at 5:48 PM, Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> wrote: > > > On 11.01.2015 23:12, Ilia Mirkin wrote: >> >> On Sun, Jan 11, 2015 at 5:08 PM, Tobias Klausmann >> <tobias.johannes.klausmann at mni.thm.de> wrote: >>> >>> >>> On 11.01.2015 22:54, Ilia Mirkin wrote: >>>>
2016 Sep 27
2
[PATCH] nv50/ir: constant fold OP_SPLIT
Split the source immediate value into two new values and create OP_MOV instructions the two newly created values. Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
2016 Sep 30
2
[PATCH] nv50/ir: constant fold OP_SPLIT
On 28.09.2016 02:01, Ilia Mirkin wrote: > On Tue, Sep 27, 2016 at 7:25 PM, Tobias Klausmann > <tobias.johannes.klausmann at mni.thm.de> wrote: >> Split the source immediate value into two new values and create OP_MOV >> instructions the two newly created values. >> >> Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> >> ---
2016 Sep 30
2
[PATCH v2] nv50/ir: constant fold OP_SPLIT
Split the source immediate value into two new values and create OP_MOV instructions the two newly created values. V2: get rid of special cases Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git
2015 Jan 11
2
[PATCH] nv50/ir: Handle OP_CVT when folding constant expressions
On Sun, Jan 11, 2015 at 4:40 PM, Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> wrote: > Folding for conversions: F32->(U{16/32}, S{16/32}) and (U{16/32}, {S16/32})->F32 > > Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> > --- > V2: Split out F64 parts > V3: remove handling of saturate for (U/S)32, > >