similar to: [PATCH] tegra: acquire and enable reference clock if needed

After long term efforts of fixing non-common clock implementations, clk_disable() is a no-op for a NULL pointer input, and this is now tree-wide consistent. All clock consumers can safely call clk_disable(_unprepare) without NULL pointer check. Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com> --- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 15 +++++----------

On Tegra186 systems with certain firmware revisions, leaving the GPU in reset can cause a hang. To prevent this, don't leave the GPU in reset. Signed-off-by: Mikko Perttunen <mperttunen at nvidia.com> --- drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c

Add a platform driver for Nouveau devices declared using the device tree or platform data. This driver currently supports GK20A on Tegra platforms and is only compiled for these platforms if Nouveau is enabled. Nouveau will probe the chip type itself using the BOOT0 register, so all this driver really needs to do is to make sure the module is powered and its clocks active before calling

op 26-06-14 07:33, Alexandre Courbot schreef: > Add a platform driver for Nouveau devices declared using the device tree > or platform data. This driver currently supports GK20A on Tegra > platforms and is only compiled for these platforms if Nouveau is > enabled. > > Nouveau will probe the chip type itself using the BOOT0 register, so all > this driver really needs to do is

Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/nouveau_platform.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drm/nouveau/nouveau_platform.c b/drm/nouveau/nouveau_platform.c index 49d9ba0e3c51..1ada186fab77 100644 --- a/drm/nouveau/nouveau_platform.c +++ b/drm/nouveau/nouveau_platform.c @@ -62,6 +62,12 @@ static const struct

DMA mask is typically set in nouveau_ttm_init(), but this function is called late during initialization and GK20A's instmem will have called DMA functions before this happens. Having a wrongly set DMA mask can result in the use of unneeded bounce buffers. Set it early to avoid this. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- Changes since v1: - Set mask in tegra.c

On Tegra186, powergating is handled by the BPMP power domain provider and the "legacy" powergating API is not available. Therefore skip these calls if we are attached to a power domain. Signed-off-by: Mikko Perttunen <mperttunen at nvidia.com> --- drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git

Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc:

On Thu, Apr 26, 2018 at 03:58:19PM +0530, Vaishali Thakkar wrote: > It's been a while since we introduced drm_dev{get/put} functions > to replace reference/unreference in drm subsystem for the > consistency purpose. So, with this patch, let's just replace > all current use cases of drm_dev_unref() with drm_dev_put and remove > the function itself. > > Coccinelle was

GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for its base engines after reworking secboot a bit to accomodate its calling convention better. This patchset has been tested rendering simple off-screen buffers using Mesa and yielded the expected result. Alexandre Courbot (15): secboot: allow to boot multiple falcons secboot: pass instance to LS firmware loaders secboot:

Am Montag, den 25.01.2016, 18:44 +0900 schrieb Alexandre Courbot: > nvkm_device_tegra_new initializes the irq member of the Tegra device > to -1 in order to signal that it is uninitialized. However, > nvkm_device_tegra_fini tests it against 0 to check whether an IRQ has > been allocated or not. This leads to free_irq being called on -1 > during > device initialization. > The

On Sat, May 20, 2017 at 3:04 PM, Masahiro Yamada <yamada.masahiro at socionext.com> wrote: > 2017-05-21 2:58 GMT+09:00 Masahiro Yamada <yamada.masahiro at socionext.com>: >> After long term efforts of fixing non-common clock implementations, >> clk_disable() is a no-op for a NULL pointer input, and this is now >> tree-wide consistent. >> >> All clock

2017-05-21 2:58 GMT+09:00 Masahiro Yamada <yamada.masahiro at socionext.com>: > After long term efforts of fixing non-common clock implementations, > clk_disable() is a no-op for a NULL pointer input, and this is now > tree-wide consistent. > > All clock consumers can safely call clk_disable(_unprepare) without > NULL pointer check. > > Signed-off-by: Masahiro Yamada

It's been a while since we introduced drm_dev{get/put} functions to replace reference/unreference in drm subsystem for the consistency purpose. So, with this patch, let's just replace all current use cases of drm_dev_unref() with drm_dev_put and remove the function itself. Coccinelle was used for mass-patching. Signed-off-by: Vaishali Thakkar <vthakkar1994 at gmail.com> ---

It's been a while since we introduced drm_dev{get/put} functions to replace reference/unreference in drm subsystem for the consistency purpose. So, with this patch, let's just replace all current use cases of drm_dev_unref() with drm_dev_put and remove the function itself. Coccinelle was used for mass-patching. Signed-off-by: Vaishali Thakkar <vthakkar1994 at gmail.com> ---

It's been a while since we introduced drm_dev{get/put} functions to replace reference/unreference in drm subsystem for the consistency purpose. So, with this patch, let's just replace all current use cases of drm_dev_unref() with drm_dev_put and remove the function itself. Coccinelle was used for mass-patching. Signed-off-by: Vaishali Thakkar <vthakkar1994 at gmail.com> ---

actually very glad to see this because I think I've seen one bug in the wild as a result of things not getting shut down :) Reviewed-by: Lyude Paul <lyude at redhat.com> Tested-by: Lyude Paul <lyude at redhat.com> On Thu, 2023-09-21 at 12:26 -0700, Douglas Anderson wrote: > Based on grepping through the source code this driver appears to be > missing a call to

From: Thierry Reding <treding at nvidia.com> Hi Ben, here's a revised subset of the patches I had sent out a couple of weeks ago. I've reworked the BAR2 accesses in the way that you had suggested, which at least for GP10B turned out to be fairly trivial to do. I have not looked in detail at this for GV11B yet, but a cursory look showed that BAR2 is accessed in more places, so the

From: Thierry Reding <treding at nvidia.com> Hi Ben, here's a revised subset of the patches I had sent out a couple of weeks ago. I've reworked the BAR2 accesses in the way that you had suggested, which at least for GP10B turned out to be fairly trivial to do. I have not looked in detail at this for GV11B yet, but a cursory look showed that BAR2 is accessed in more places, so the

From: Thierry Reding <treding at nvidia.com> Hi, the GPU on Jetson TX2 (GP10B) does not work properly on all devices. Why exactly is not clear, but there are slight differences between the SKUs that were tested. It turns out that the biggest issue is that on some devices (e.g. the one that I have), pulsing the GPU reset twice as is done in the current code (once as part of the power-ungate