similar to: [PATCH v2 00/22] Volting/Clocking improvements for Fermi and newer

This series fixes most of the issues regarding volting on GPUs with any form of GPU Boost inside their vbios, which is mainly Kepler and newer, but we find some boosting related tables in Fermi vbios' already In the end reclocking should work on most Kepler cards without any issues Karol Herbst (19): bios/volt: handle voltage table version 0x50 with 0ed header volt: properly detect entry

This is an updated series for the old clocking improvement one. I think I got everything needed in place and also a simple update mechanism for updating the cstates/voltage on temperature changes. If anything is unclear how I REed or got the information, please leave a note so that I can provide additional information in the commits. Besides that I think we are pretty close now and only some

We are slowly getting there! v4 of the series with some realy good improvements, so I am sure this is like 95% done and only needs some proper polishing and proper Reviews! I also added the NvVoltOffsetmV module parameter, so that a user is able to over and !under!-volt the GPU. Overvolting makes sense, when there are still some reclocking issues left, which might be solved by a higher voltage.

This series contains a lot of groundwork to finally fix reclocking issues on Kepler+ gpus. There shouldn't be any functional changes with the first patch being the only exception (fixes some voltage table parsing issues with of few kepler gpus) The most interessting thing is the tool in the last patch, which can be ran alongside the nvidia driver to test nouveaus volting code and print the

I've splitted my big series between the part which actually fixes the engine reclocking bits and the part handling voltage/clock updates on temperature change, so that the more reviewed parts can be merged in faster. This series fixes a lot of Engine reclocking issues found on Fermi, Kepler and all Maxwell generation GPUs. It does _not_ fix memory reclocking on Fermi. It mostly contains of

this series solves different issues we encounter on kepler cards while reclocking: 1. core clock doesn't change at all and produces a volting error (patch 1) this can happen when the voltage table has only 0ed values in the header so we have to parse the entries itself, which contain the right voltages 2. kepler won't clock to highest cstates (patch 2) this happens, because there are

this series solves different issues we encounter on kepler cards while reclocking: 1. core clock doesn't change at all and produces a volting error (patch 1) this can happen when the voltage table has only 0ed values in the header so we have to parse the entries itself, which contain the right voltages 2. kepler won't clock to highest cstates (patch 2) this happens, because there are

With these both patches, most of the kepler cards should be able to reclock their core clock without issues. These patches should be tested carefully among nouveau devs, so that these don't break reclocking on other cards (especially Teslas). Particularly the second one might break reclocking here and there. Karol Herbst (2): bios/volt: handle voltage table version 0x50 with 0ed header

It's better to use "list_for_each_entry_from_reverse" for iterating list than "for loop" as it makes the code more clear to read. This patch replace "for loop" with "list_for_each_entry_from_reverse" and remove "cstate" variable as it is redundant in the code. Signed-off-by: Arushi Singhal <arushisinghal19971997 at gmail.com> ---

Last update here: https://lists.freedesktop.org/archives/nouveau/2017-September/028848.html Basically big cleanup, reordering, simplifications and some renaming to make the code easier to read and to review. I also moved some bugfixes to the front so they can be merged prior the other patches. There was also a bug related to the therm daemon triggering a pstate change leading to PMU lockups,

Just wanted to post updated versions of my last series/patches. Reviews welcomed. It would be also nice if we agree on features I should focus upstreaming, so that this work can be better splitted or reordered. Sadly most of my patches depend on the rather big clk subdev rework and I think those patches shows best, why I think this rework is actually needed and makes things much easier to add

On Mon, Mar 26, 2018 at 4:01 AM, Arushi Singhal <arushisinghal19971997 at gmail.com> wrote: > It's better to use list_entry instead of list_{next/prev}_entry > as it makes the code more clear to read. > This patch replace list_entry with list_{next/prev}_entry. > > Signed-off-by: Arushi Singhal <arushisinghal19971997 at gmail.com> Acked-by: Ben Skeggs <bskeggs at

This patch replace list_entry with list_{next/prev}_entry as it makes the code more clear to read. Done using coccinelle: @@ expression e1; identifier e3; type t; @@ ( - list_entry(e1->e3.next,t,e3) + list_next_entry(e1,e3) | - list_entry(e1->e3.prev,t,e3) + list_prev_entry(e1,e3) ) Signed-off-by: Arushi Singhal <arushisinghal19971997 at gmail.com> --- drivers/gpu/drm/drm_lease.c

Replace list_entry with list_{next/prev}_entry. Arushi Singhal (2): gpu: drm/lease:: Use list_{next/prev}_entry instead of list_entry gpu: drm: nouveau: Use list_{next/prev}_entry instead of list_entry drivers/gpu/drm/drm_lease.c | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) -- changes in v2 *All the

On Mon, Mar 19, 2018 at 12:44 PM, Julia Lawall <julia.lawall at lip6.fr> wrote: > > > On Mon, 19 Mar 2018, Arushi Singhal wrote: > > > This patch replace list_entry with list_{next/prev}_entry as it makes > > the code more clear to read. > > Done using coccinelle: > > > > @@ > > expression e1; > > identifier e3; > > type t; >

This series addresses various issues inside the reclocking code: 1. after resume the set clocks are reset 2. reclocking not possible while GPU is suspended 3. nouveau always does full reclocks even if only a change of the voltage is required Some of the patches were part of the bigger reclocking series I sent months ago, some things have changed though. This is also preparation work of

This series does some refactoring in the GK20A's volt and clk drivers (fixing a few things while we are at it) to let GM20B benefit from the GK20A's logic with which it is compatible. GM20B is capable of more sophisticated (and power-efficient) reclocking which will follow later. Even after this more fancy reclocking is merged, the present logic will remain used in the lowest speedo of

Adds Nouveau controlled thermal throttling for Kepler+ GPUs. With this I feel safe enough to add support for Maxwell2 reclocking later on (still hidden behind a switch, but we can be fairly sure to not overheat hardware if a user isn't carefull enough) Contains all patches from my clk update series, but I thought it makes sense to include those in this series as well for completness. Please

This series adds support for GM20B PLL's Maxwell features, namely glitchless switch and (more importantly) DFS support. DFS lets the PLL lower its output speed according to input current variations, making the clock more stable and allowing it to run safely at lower voltage. All GM20B additions are done in the last patch, which consequently ends up being considerably big ; fortunately, it

On a very few GPUs with the voltage table version 0x50 we have to read out the VIDs out of the entries of the table, where all the other gpus are either PWM based or get a base and a step voltage out of the table header. Currently nouveau tried to autodetect this and actually doesn't parse the entries. This Series adds two things: 1. It parses the entries 2. It decides upon a field in the