similar to: [Bug 92870] New: GF117M nvkm_pmu_pgob fault

On 3 September 2015 at 16:32, Alexandre Courbot <acourbot at nvidia.com> wrote: > Some devices may not have a PMU. Avoid a NULL pointer dereference in > such cases. > > Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> > --- > drm/nouveau/nvkm/engine/gr/gf100.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git

On 3 September 2015 at 17:11, Alexandre Courbot <gnurou at gmail.com> wrote: > On Thu, Sep 3, 2015 at 4:08 PM, Ben Skeggs <skeggsb at gmail.com> wrote: >> On 3 September 2015 at 16:32, Alexandre Courbot <acourbot at nvidia.com> wrote: >>> Some devices may not have a PMU. Avoid a NULL pointer dereference in >>> such cases. >>> >>>

Two trivial PMU-related fixes for Tegra: - Add a dummy func member to GK20A, since nvkm_pmmu_pgob() unconditionally dereferences it - Check whether a PMU actually exists before calling nvkm_pmmu_pgob(). During early bringup we are likely to not have a PMU Alexandre Courbot (2): pmu/gk20a: add dummy func gr/gf100: do not assume a PMU is present drm/nouveau/nvkm/engine/gr/gf100.c | 3 ++-

https://bugs.freedesktop.org/show_bug.cgi?id=85742 Bug ID: 85742 Summary: GF117M Can *not* use nouveau at all Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: critical Priority: medium Component: Driver/nouveau Assignee: nouveau

This commit should be backported to kernel 4.3 (apologies for line-wrapping). Without it, we get a null deref (i.e. oops) on GF117 GPUs which for one reason or another don't have the PMU hooked up. That should be fixed in its own right, but that's a separate matter. The issue was introduced in commit e2ca4e7d6e (drm/nouveau/pmu: convert to new-style nvkm_subdev) commit

From: Deepak Goyal <dgoyal at nvidia.com> - Maps PMU firmware into PMU virtual memory. - Copy bootloader into PMU memory and start it. - Allow the PMU to interact with HOST via interrupts. PMU after successful configurations (to follow after this patch) will: 1.Autonomously power gate graphics engine when not in use.It will save us a lot of power. 2.Provide better way to scale frequencies

Both patches should make the communicating with the PMU more stable. Karol Herbst (2): pmu: fix queued messages while getting no IRQ pmu: be more strict about locking drm/nouveau/nvkm/subdev/pmu/base.c | 49 ++++++++++++++++++++++++++++++++------ 1 file changed, 42 insertions(+), 7 deletions(-) -- 2.7.2

Hi guys, I don't know if it is useful to just post some random kernel warnings/errors, but here they are: [marcos at xfiles ~]$ journalctl -b -p 3 | grep nouveau Jan 08 15:37:05 xfiles kernel: nouveau 0000:04:00.0: volt: couldn't find speedo value, volting not possible Jan 08 15:37:05 xfiles kernel: nouveau 0000:04:00.0: bus: MMIO write of ffff981f FAULT at 6013d4 [ IBUS ] Jan 08

- Maps PMU firmware into PMU virtual memory. - Copy bootloader into PMU memory and start it. - Allow the PMU to interact with HOST via interrupts. PMU after successful configurations (to follow after this patch) will: 1.Autonomously power gate graphics engine when not in use.It will save us a lot of power. 2.Provide better way to scale frequencies by reporting Perf counters. 3.Be critical for GPU

It adds PMU boot support.It loads PMU firmware into PMU falcon.RM/Kernel driver receives INIT ack (through interrupt mechanism) from PMU when PMU boots with success. Signed-off-by: Deepak Goyal <dgoyal at nvidia.com> --- drm/nouveau/include/nvkm/subdev/pmu.h | 26 +- drm/nouveau/nvkm/subdev/pmu/base.c | 108 ++ drm/nouveau/nvkm/subdev/pmu/gk20a.c | 2131

Fixes secure boot on my gp107. No idea why. Otherwise the GPU enters complete lockdown after starting the gpccs and fecs with the LS images loaded. Signed-off-by: Karol Herbst <kherbst at redhat.com> --- drm/nouveau/nvkm/engine/gr/gf100.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drm/nouveau/nvkm/engine/gr/gf100.c b/drm/nouveau/nvkm/engine/gr/gf100.c index

On 12/22/2014 05:11 PM, Vince Hsu wrote: > The platform device does not use the common nouveau_pwr_init() to initialize > the PWR, but it does need the .prob() be assigned to avoid NULL pointer > dereference in graph/nve4.c. s/prob/pgob/ :-( Will fix in next version. > > Signed-off-by: Vince Hsu <vinceh at nvidia.com> > --- > > v2: this patch is added since v2. (v1

https://bugs.freedesktop.org/show_bug.cgi?id=111128 Bug ID: 111128 Summary: Impossible to change pstate on GT610M Product: Mesa Version: 19.1 Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/nouveau Assignee: nouveau

On Tue, Nov 28, 2017 at 4:36 PM, Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> wrote: > Hi, > > comments inline > > On 11/28/17 2:11 PM, Karol Herbst wrote: >> >> Fixes secure boot on my gp107. No idea why. Otherwise the GPU enters >> complete lockdown after starting the gpccs and fecs with the LS images >> loaded. >> >>

On Fri, Jul 15, 2016 at 12:41:49PM -0400, Ilia Mirkin wrote: > On Fri, Jul 15, 2016 at 12:36 PM, Peter Wu <peter at lekensteyn.nl> wrote: > > On Fri, Jul 15, 2016 at 12:10:23PM -0400, Ilia Mirkin wrote: > >> On Fri, Jul 15, 2016 at 9:12 AM, Peter Wu <peter at lekensteyn.nl> wrote: > >> > Hi, > >> > > >> > Here are two patches to fix

could you grab the vbios from /sys/kernel/debug/dri/1/vbios.rom and maybe also do a mmiotrace with the nvidia driver (using bumblebee or second X server by hand or so)? thanks 2017-01-08 19:22 GMT+01:00 Marcos Paulo de Souza <marcos.souza.org at gmail.com>: > Hi guys, > > I don't know if it is useful to just post some random kernel warnings/errors, but here they are: > >

https://bugs.freedesktop.org/show_bug.cgi?id=75199 Priority: medium Bug ID: 75199 Assignee: nouveau at lists.freedesktop.org Summary: unsupported GT620M in Samsung All-in-One PC DP500A2D QA Contact: xorg-team at lists.x.org Severity: normal Classification: Unclassified OS: Linux (All) Reporter: slappinjohn

I think I am done reworking the series and getting to a point where I think it is basically finished. The configuration of the slots could be improved later on when working on dynamic reclocking, but for now it's good enough to report the current GPU utilization to userspace. Patches 1-4 imeplement PMU commands to setup and readout the counters. Patches 5-6 lets Nouveau make use of 1-4. Patch

On Mon, Oct 26, 2015 at 2:13 PM, Karol Herbst <nouveau at karolherbst.de> wrote: > From: Karol Herbst <git at karolherbst.de> > > --- > drm/nouveau/include/nvif/device.h | 1 + > drm/nouveau/include/nvkm/subdev/pmu.h | 10 ++++++++++ > drm/nouveau/nouveau_debugfs.c | 23 +++++++++++++++++++++++ > drm/nouveau/nvkm/subdev/pmu/base.c | 18

There might be some callers of nouveau_clock_astate(), and they are from inetrrupt context. So we must ensure that this function can be atomic in that condition. This patch adds one parameter which is subsequently passed to nouveau_pstate_calc(). Therefore we can choose whether we want to wait for the pstate work's completion or not. Signed-off-by: Vince Hsu <vinceh at nvidia.com> ---