similar to: [PATCH v2 4/4] nouveau/debugfs: add interface for current load

From: Karol Herbst <git at karolherbst.de> --- drm/nouveau/include/nvif/device.h | 1 + drm/nouveau/include/nvkm/subdev/pmu.h | 10 ++++++++++ drm/nouveau/nouveau_debugfs.c | 23 +++++++++++++++++++++++ drm/nouveau/nvkm/subdev/pmu/base.c | 18 ++++++++++++++++++ 4 files changed, 52 insertions(+) diff --git a/drm/nouveau/include/nvif/device.h

From: Karol Herbst <git at karolherbst.de> v2: optimize macro and fixed data array type v3: fix bug I added in the last version --- drm/nouveau/include/nvif/device.h | 1 + drm/nouveau/include/nvkm/subdev/pmu.h | 10 ++++++++++ drm/nouveau/nouveau_debugfs.c | 23 +++++++++++++++++++++++ drm/nouveau/nvkm/subdev/pmu/base.c | 18 ++++++++++++++++++ 4 files changed, 52

On Mon, Oct 26, 2015 at 2:13 PM, Karol Herbst <nouveau at karolherbst.de> wrote: > From: Karol Herbst <git at karolherbst.de> > > --- > drm/nouveau/include/nvif/device.h | 1 + > drm/nouveau/include/nvkm/subdev/pmu.h | 10 ++++++++++ > drm/nouveau/nouveau_debugfs.c | 23 +++++++++++++++++++++++ > drm/nouveau/nvkm/subdev/pmu/base.c | 18

this series makes use of the load counters we can use to get information about the current load of the gpu. This series includes the needed pmu bits and a debugfs interface to read them out. Currently the values are between 0 and 255, because it is much easier to implement it this way on the pmu. Karol Herbst (4): subdev/pmu/fuc: add gk104 pmu/fuc: add macros for pdaemon pwr counters

these are usually used for dynamic reclocking on gt215 and newer The counters are used to get the load of the core, memory, video and pcie loads currently I expose the loads through a debugfs "current_load" file, but I want to move that to nvif and just add a wrapper around that in debugfs for convenience Anyway there are still some issues I would like to discuss: 1. currently the

these are usually used for dynamic reclocking on gt215 and newer The counters are used to get the load of the core, memory, video and pcie loads currently I expose the loads through a debugfs "current_load" file, but I want to move that to nvif and just add a wrapper around that in debugfs for convenience. Using nvif would have the advantage, that userspace tools can easily get loads

Signed-off-by: Roy Spliet <nouveau at spliet.org> --- drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h | 2 + drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h | 8 +++ drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c | 66 +++++++++++++++++++++++ 3 files changed, 76 insertions(+) diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h

reworked this series quite a lot. Now we want the Host to configure the counters through the PMU. The series isn't complete though because it needs: 1. reordering 2. better commit messages but I felt like sending those out before doing a final version. I also found some weird register overwriting issue on the PMU I have to track down, because it interfers with the counter read out. I am

I think I am done reworking the series and getting to a point where I think it is basically finished. The configuration of the slots could be improved later on when working on dynamic reclocking, but for now it's good enough to report the current GPU utilization to userspace. Patches 1-4 imeplement PMU commands to setup and readout the counters. Patches 5-6 lets Nouveau make use of 1-4. Patch

Hi All, I took this idea Christian Hellsten and Jarkko Laine''s "Beginning Ruby on Rails E-Commerce". Here is the situation. I will be using the "options_from_collection_for_select" and "collection_select" form helper methods in my view to render drop-down selection lists for City and State that have corresponding city_id and state_id foreign key references

Hi Deepak, There's... a lot of stuff going on here. Can you describe the goal of this patch (which could then be used as the patch commit message)? The current one basically boils down to "Add support for loading PMU", but merely loading the fw into a fuc engine is just a handful lines of code. Also, except in rare cases, it's customary to split up patches of this size into

Hi Mirkin, Your observations are quiet correct. After the boot code is submitted successfully, I will submit the code to configure & enable features of PMU.(This will be done by sending cmds to PMU). Now talking about this patch: Apart from just the boot code, I have also included some things in this patch that I can remove for now(I will include these things in later digestible chunks): -

Add a PMU constructor so implementations that extend the nvkm_pmu structure can have all base members properly initialized. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/nvkm/subdev/pmu/base.c | 21 +++++++++++++++------ drm/nouveau/nvkm/subdev/pmu/priv.h | 2 ++ 2 files changed, 17 insertions(+), 6 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/pmu/base.c

It adds PMU boot support.It loads PMU firmware into PMU falcon.RM/Kernel driver receives INIT ack (through interrupt mechanism) from PMU when PMU boots with success. Signed-off-by: Deepak Goyal <dgoyal at nvidia.com> --- drm/nouveau/include/nvkm/subdev/pmu.h | 26 +- drm/nouveau/nvkm/subdev/pmu/base.c | 108 ++ drm/nouveau/nvkm/subdev/pmu/gk20a.c | 2131

- Maps PMU firmware into PMU virtual memory. - Copy bootloader into PMU memory and start it. - Allow the PMU to interact with HOST via interrupts. PMU after successful configurations (to follow after this patch) will: 1.Autonomously power gate graphics engine when not in use.It will save us a lot of power. 2.Provide better way to scale frequencies by reporting Perf counters. 3.Be critical for GPU

I encountered while stresstesting the reclocking code, that rarely (1 out of 20.000+ requests) we don't get any IRQ in nvkm_pmu_intr. This means we have a queued message on the pmu, but nouveau doesn't read it and waits infinitely in nvkm_pmu_send: if (reply) { wait_event(pmu->recv.wait, (pmu->recv.process == 0)); therefore let us use wait_event_timeout with a 1s timeout frame

The reset hook of pmu_func is never called, and gt215 was the only chip to implement. Remove this dead code. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/nvkm/subdev/pmu/gt215.c | 9 --------- drm/nouveau/nvkm/subdev/pmu/priv.h | 2 -- 2 files changed, 11 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/pmu/gt215.c b/drm/nouveau/nvkm/subdev/pmu/gt215.c index

I encountered while stresstesting the reclocking code, that rarely (1 out of 20.000+ requests) we don't get any IRQ in nvkm_pmu_intr. This means we have a queued message on the pmu, but nouveau doesn't read it and waits infinitely in nvkm_pmu_send: if (reply) { wait_event(pmu->recv.wait, (pmu->recv.process == 0)); therefore let us use wait_event_timeout with a 1s timeout frame

On 13 April 2015 at 20:42, Alexandre Courbot <acourbot at nvidia.com> wrote: > Ben, I guess our main remaining concern with this patch is how it should > integrate wrt. the existing PMU code. Since it is designed to interact with > the NVIDIA firmware, maybe we should use a different base code, or do you > think we can somehow share code and data structures? Hey Alexandre, Sorry

From: Deepak Goyal <dgoyal at nvidia.com> - Maps PMU firmware into PMU virtual memory. - Copy bootloader into PMU memory and start it. - Allow the PMU to interact with HOST via interrupts. PMU after successful configurations (to follow after this patch) will: 1.Autonomously power gate graphics engine when not in use.It will save us a lot of power. 2.Provide better way to scale frequencies