similar to: [PATCH 0/2] two trivial PMU fixes

This was the first step of the secure boot refactoring - as Ben asked for some fixes, I now submit it as its own series to make it easier to review (and also because rebasing secure boot on top of this takes time and I don't want to do it until this is validated!). This series attempts to factorize the duplicate falcon-related code into a single library, using the existing nvkm_falcon

On 3 September 2015 at 16:32, Alexandre Courbot <acourbot at nvidia.com> wrote: > Some devices may not have a PMU. Avoid a NULL pointer dereference in > such cases. > > Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> > --- > drm/nouveau/nvkm/engine/gr/gf100.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git

On 3 September 2015 at 17:11, Alexandre Courbot <gnurou at gmail.com> wrote: > On Thu, Sep 3, 2015 at 4:08 PM, Ben Skeggs <skeggsb at gmail.com> wrote: >> On 3 September 2015 at 16:32, Alexandre Courbot <acourbot at nvidia.com> wrote: >>> Some devices may not have a PMU. Avoid a NULL pointer dereference in >>> such cases. >>> >>>

- Maps PMU firmware into PMU virtual memory. - Copy bootloader into PMU memory and start it. - Allow the PMU to interact with HOST via interrupts. PMU after successful configurations (to follow after this patch) will: 1.Autonomously power gate graphics engine when not in use.It will save us a lot of power. 2.Provide better way to scale frequencies by reporting Perf counters. 3.Be critical for GPU

It adds PMU boot support.It loads PMU firmware into PMU falcon.RM/Kernel driver receives INIT ack (through interrupt mechanism) from PMU when PMU boots with success. Signed-off-by: Deepak Goyal <dgoyal at nvidia.com> --- drm/nouveau/include/nvkm/subdev/pmu.h | 26 +- drm/nouveau/nvkm/subdev/pmu/base.c | 108 ++ drm/nouveau/nvkm/subdev/pmu/gk20a.c | 2131

From: Deepak Goyal <dgoyal at nvidia.com> - Maps PMU firmware into PMU virtual memory. - Copy bootloader into PMU memory and start it. - Allow the PMU to interact with HOST via interrupts. PMU after successful configurations (to follow after this patch) will: 1.Autonomously power gate graphics engine when not in use.It will save us a lot of power. 2.Provide better way to scale frequencies

https://bugs.freedesktop.org/show_bug.cgi?id=92870 Bug ID: 92870 Summary: GF117M nvkm_pmu_pgob fault Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Driver/nouveau Assignee: nouveau at

On 18/04/16 22:14, Karol Herbst wrote: > we will access the current set cstate at least every second and this safes us saves > some CPU cycles looking them up every second. > > Signed-off-by: Karol Herbst <nouveau at karolherbst.de> > --- > drm/nouveau/include/nvkm/subdev/clk.h | 2 +- > drm/nouveau/nvkm/engine/device/ctrl.c | 5 ++++- >

nvkm_mm_fini() was not called when exiting the driver, resulting in a memory leak. Fix this. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/nouveau_platform.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drm/nouveau/nouveau_platform.c b/drm/nouveau/nouveau_platform.c index 3691982452a9..f83aa12ee5c6 100644 --- a/drm/nouveau/nouveau_platform.c +++

The patch seems fine but I found it super confusing that sometimes `pstate` is a pointer (for example `clk->pstate`), sometimes it is an int (for example `args->v0.pstate`). On 2017-09-15 — 17:11, Karol Herbst wrote: > We will access the current cstate at least every second and this saves us > some CPU cycles looking them up every second. > > v2: Rewording commit message. >

Hi Deepak, There's... a lot of stuff going on here. Can you describe the goal of this patch (which could then be used as the patch commit message)? The current one basically boils down to "Add support for loading PMU", but merely loading the fw into a fuc engine is just a handful lines of code. Also, except in rare cases, it's customary to split up patches of this size into

Fixes secure boot on my gp107. No idea why. Otherwise the GPU enters complete lockdown after starting the gpccs and fecs with the LS images loaded. Signed-off-by: Karol Herbst <kherbst at redhat.com> --- drm/nouveau/nvkm/engine/gr/gf100.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drm/nouveau/nvkm/engine/gr/gf100.c b/drm/nouveau/nvkm/engine/gr/gf100.c index

Hi Mirkin, Your observations are quiet correct. After the boot code is submitted successfully, I will submit the code to configure & enable features of PMU.(This will be done by sending cmds to PMU). Now talking about this patch: Apart from just the boot code, I have also included some things in this patch that I can remove for now(I will include these things in later digestible chunks): -

This commit should be backported to kernel 4.3 (apologies for line-wrapping). Without it, we get a null deref (i.e. oops) on GF117 GPUs which for one reason or another don't have the PMU hooked up. That should be fixed in its own right, but that's a separate matter. The issue was introduced in commit e2ca4e7d6e (drm/nouveau/pmu: convert to new-style nvkm_subdev) commit

On Tue, Nov 28, 2017 at 4:36 PM, Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> wrote: > Hi, > > comments inline > > On 11/28/17 2:11 PM, Karol Herbst wrote: >> >> Fixes secure boot on my gp107. No idea why. Otherwise the GPU enters >> complete lockdown after starting the gpccs and fecs with the LS images >> loaded. >> >>

Hi, This is a try to have some simple DVFS (Dynamic Voltage and Frequency Scaling) support for GK20A. Instead of relying on other existing frequency scaling framework, we create a simple subdev in Nouveau for the same purpose. That's because we don't want to make the DVFS implementation for GK20A far more than enough in the beginning and hinder the implementation for dGPU in the future.

On Thu, Dec 18, 2014 at 8:13 PM, Vince Hsu <vinceh at nvidia.com> wrote: > Hello Ben, > > On 12/18/2014 05:34 PM, Ben Skeggs wrote: >> >> On Thu, Dec 18, 2014 at 4:28 PM, Vince Hsu <vinceh at nvidia.com> wrote: >>> >>> This patch creates a subdev for DVFS (Dynamic Voltage and Frequency >>> Scaling) >>> support in Nouveau. This

This series addresses various issues inside the reclocking code: 1. after resume the set clocks are reset 2. reclocking not possible while GPU is suspended Some of the patches were part of the bigger reclocking series I sent months ago, some things have changed though. This is also preparation work of changing the clock state due to temperature changes and dynamic reclocking. v2: remove commits

This series addresses various issues inside the reclocking code: 1. after resume the set clocks are reset 2. reclocking not possible while GPU is suspended 3. racy reclocking while GPU is suspending and leading to hangs Some of the patches were part of the bigger reclocking series I sent months ago, some things have changed though. This is also preparation work of changing the clock state due to

On Thu, Dec 18, 2014 at 4:28 PM, Vince Hsu <vinceh at nvidia.com> wrote: > This patch creates a subdev for DVFS (Dynamic Voltage and Frequency Scaling) > support in Nouveau. This subdev refers to the status information provided by > the NVIDIA hardware and tries to adjust the performance level based on the > calculated target. Only the GK20A is supported right now. Hey Vince,