similar to: Fix reclocking regression in drm-next

Displaying 20 results from an estimated 900 matches similar to: "Fix reclocking regression in drm-next"

2014 Aug 23
2
RESEND NVA3 clock tree improvements
Resend of patch #7 to fix behaviour when failing to pause parts of the GPU
2016 Jun 04
3
PM + Init work
Following a series of three patches, two of which have been sitting in my tree for a while, the third is the result of some inspection of an NV134 BIOS that seems to use the 0xaf upcode to upload training patterns. Please test! Roy Ps. Sorry they come from yet another e-mail address. My previous provider, eclipso, actively blocks users of git send-email. Inquiries fall on deaf ears, hence I
2014 Aug 29
1
RESENT NVA3 clock tree improvements
Re-resend of patch #7 to move the _post and _pre function prototypes to nva3.h
2014 Aug 21
9
NVA3 clock tree improvements
Following a series of patches to improve nouveaus clock tree parsing. Reclocking these engines (all but memory) is pretty stable on the cards I've tested. Please review and merge when approved. These patches do not solve the problem that core/shader engine doesn't like to be clocked up too far without fb following, with visible corruption as a result. I suspect this problem is unrelated
2013 Nov 09
2
[PATCH] drm/nouveau/clk: Initial implementation for reclocking NVAA/NVAC
Reclocking of NVAA/NVAC is substantially different from NV50+, enough to justify a separate clock implementation. This code is a forward-port of reclocking code that has been sitting in a branch for a while, and has been tested on my NVAC. Traces show no significant reasons why this shouldn't work on NVAA, but testers are always welcome. And since these are IGPs without dedicated RAM to
2015 Sep 29
10
All-round reclocking improvements
In bulletpoints: - Add some support for G94 and G96 reclocking. Has been tested on literally two cards, which is hardly adequate as "full coverage". On the other hand, the changes were small enough to make me confident this might work for others as well. - Fix NV50 wait for VBLANK when no monitor is plugged in. - Voltage related inprovements for GT21x. - Slightly improve Keplers
2015 May 22
11
Reclocking support for NVA0
Adds reclocking for NVA0, and a whole lot of work for other cards. Had these patches collecting dust for a little, but tested them with both my NVA0, and Martin's a while back. Success not guaranteed, but should be quite a leap forward. Happy reviewing and testing. Cheers, Roy
2016 Jan 13
5
[PATCH 0/2] allow partly reclocking on chipset
some chipset have working engine reclocking, but broken memory reclocking like Fermi. We should for now, add the functionality to allow partly reclocking for those. Allthough this doesn't give as much performance as one might wish, it is till noticeable and may improve performance enough to be noted. Karol Herbst (2): clk: seperate engine and memory reclock toggles clk: allow engine
2014 Aug 21
0
[PATCH 7/7] clock/nva3: Pause the GPU before reclocking
Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- .../gpu/drm/nouveau/core/include/subdev/clock.h | 3 ++ drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c | 45 ++++++++++++++++++++++ drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c | 30 ++++----------- 3 files changed, 55 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h
2014 Aug 23
0
[PATCH] clock/nva3: Pause the GPU before reclocking
V2: always call post correctly even if pre fails Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- .../gpu/drm/nouveau/core/include/subdev/clock.h | 3 ++ drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c | 52 +++++++++++++++++++++- drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c | 36 +++++---------- 3 files changed, 66 insertions(+), 25 deletions(-) diff --git
2016 Jan 13
2
[PATCH 0/2] allow partly reclocking on chipset
> Samuel Pitoiset <samuel.pitoiset at gmail.com> hat am 13. Januar 2016 um 13:43 > geschrieben: > > Hi! > > Did you check on different Fermi chipsets or only with one variant? currently I only checked that on my nvc1, but I thought I could just send the patches and it is easier for others to try it out this way. > > Are you sure that engine reclocking works as
2016 Jun 17
1
[PATCH v2 1/2] nvkm/clk/gf100+: Clean up PLL locking test
Corresponds with GT215. Don't rely on the lock test logic being unconditionally enabled, and disable test logic when done (presumably to save power). v2: Remove warning, nvkm_msec already warns on time-out Signed-off-by: Roy Spliet <nouveau at spliet.org> --- drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c | 8 +++++++- drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c | 8 +++++++- 2
2017 Sep 06
2
[PATCH] [RESEND] drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning
gcc thinks that interpreting a multiplication result as a bool is confusing: drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c: In function 'read_pll': drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c:133:8: error: '*' in boolean context, suggest '&&' instead [-Werror=int-in-bool-context] In this instance, I think using multiplication is more intuitive than
2017 Apr 10
11
Preparations for Fermi DRAM clock changes
No, no, these will not implement Fermi reclocking. This set of patches contains some of the preparatory work that I deem stable enough to move upstream. Notable changes - Training pattern upload routines from GK104+ now shared with GT215+ - Timing calculation for Fermi - GDDR5 MR calculation from VBIOS timing table v1.0. Also useful for that pesky GT 240. - A routine to translate a VBIOS init
2017 Aug 31
4
[RFC PATCH] drm/nouveau/therm: initial implementation of new gp1xx temperature sensor
Signed-off-by: Rhys Kidd <rhyskidd at gmail.com> --- .../gpu/drm/nouveau/include/nvkm/subdev/therm.h | 1 + drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 6 +++ drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild | 1 + drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c | 3 +- drivers/gpu/drm/nouveau/nvkm/subdev/therm/gp100.c | 57 ++++++++++++++++++++++ 5 files changed, 67
2017 Jun 05
7
[PATCH v3 0/7] PMU engine counters
I think I am done reworking the series and getting to a point where I think it is basically finished. The configuration of the slots could be improved later on when working on dynamic reclocking, but for now it's good enough to report the current GPU utilization to userspace. Patches 1-4 imeplement PMU commands to setup and readout the counters. Patches 5-6 lets Nouveau make use of 1-4. Patch
2013 Nov 16
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
v2: Check for PFIFO, don't pause if it's not yet running. This should fix reclocking on boot Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- drivers/gpu/drm/nouveau/Makefile | 1 + drivers/gpu/drm/nouveau/core/engine/device/nv50.c | 4 +- .../gpu/drm/nouveau/core/include/subdev/clock.h | 4 + drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c | 439
2017 May 07
6
[RFC v2 0/6] PMU engine counters
reworked this series quite a lot. Now we want the Host to configure the counters through the PMU. The series isn't complete though because it needs: 1. reordering 2. better commit messages but I felt like sending those out before doing a final version. I also found some weird register overwriting issue on the PMU I have to track down, because it interfers with the counter read out. I am
2013 Nov 17
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
v2: Check for PFIFO, don't pause if it's not yet running. This should fix reclocking on boot v3: Tiny clean up Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- drivers/gpu/drm/nouveau/Makefile | 1 + drivers/gpu/drm/nouveau/core/engine/device/nv50.c | 4 +- .../gpu/drm/nouveau/core/include/subdev/clock.h | 4 +
2015 Nov 14
2
[PATCH v2] pmu: use nvkm_msec instead of do while
I hit this while loop in an error state of the gpu v2: unlock mutex only if reply == true Signed-off-by: Karol Herbst <nouveau at karolherbst.de> --- drm/nouveau/nvkm/subdev/pmu/base.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/pmu/base.c b/drm/nouveau/nvkm/subdev/pmu/base.c index 81a5583..eb248fd 100644 ---