similar to: [PATCH 00/12] Tessellation support for nvc0

This patch-series implements the ARB_viewport_array for nvc0 and does a little house-cleanig afterwords. Tobias Klausmann (3): nvc0: implement multiple viewports/scissors, enable ARB_viewport_array nvc0: mark scissor in nvc0_clear_{} nv50/ir: Remove NV50_SEMANTIC_VIEWPORTINDEX and its last consumer .../drivers/nouveau/codegen/nv50_ir_driver.h | 1 -

This patch-series implements the ARB_viewport_array for nvc0 and does a little house-cleanig afterwords. V2: Add Release-Notes, mark this in GL3 as done for nvc0 Don't mark the scissors dirty when we don't need to do that Tobias Klausmann (3): nvc0: implement multiple viewports/scissors, enable ARB_viewport_array docs: update GL3.txt, relnotes: mark GL_ARB_viewport_array as done

I went through the gallium-nine tree and picked out nouveau patches that are general bug-fixes. The first bunch I'd like to also get into 10.2. I've reviewed all of them and they make sense to me, but sending them out for public review as well in case there are any objections. Unless I hear objections, I'd like to push this by Friday. Christoph Bumiller (11): nv50,nvc0: always pull

This series is to allow NVIDIA chips with shared memory to operate more efficiently (and to operate at all once we disable VRAM from the kernel driver) by allowing nouveau_screen to specify a domain to use for objects originally allocated into VRAM. If the domain is not overridden, the default NOUVEAU_BO_VRAM is used. A NV_VRAM_DOMAIN() macro is then introduced to be used in place of

This series is to allow NVIDIA chips with shared memory to operate more efficiently (and to operate at all once we disable VRAM from the kernel driver) by allowing nouveau_screen to specify a domain to use for objects originally allocated into VRAM. If the domain is not overridden, the default NOUVEAU_BO_VRAM is used. A NV_VRAM_DOMAIN() macro is then introduced to be used in place of

New revision of this patchset that prevents VRAM objects from being allocated on VRAM-less systems like Tegra. This is required for Mesa to work on such systems. Changes since v2: - Use vram_size to detect systems without VRAM and set the correct domain instead of expecting each chip to set its domain explicitly. Alexandre Courbot (2): nouveau: support for custom VRAM domains nvc0: use

Most of codegen is already FP64-ready. There are a few edge-cases that I ran into, many of which can apply even to non-fp64-enabled programs (although the double-wide registers are not very common without fp64). I've yet to give this a full piglit run, but wanted to send these out in case someone wanted to comment. They do not depend on the preliminary core fp64 work. Ilia Mirkin (5):

This comes in handy when checking "NV50_PROG_DEBUG=1" outputs with diff! V2: - Use environmental variable (Karol Herbst) Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- src/gallium/drivers/nouveau/codegen/nv50_ir.cpp | 6 +++--- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 2 +-

This comes in handy when checking "NV50_PROG_DEBUG=1" outputs with diff! Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- src/gallium/drivers/nouveau/codegen/nv50_ir.cpp | 6 +++--- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 2 +- src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1 +

This comes in handy when checking "NV50_PROG_DEBUG=1" outputs with diff! V2: - Use environmental variable (Karol Herbst) V3: - Use the already populated nv50_ir_prog_info to forward information to the print pass (Pierre Moreau) Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1 +

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/gallium/drivers/nouveau/nouveau_buffer.c | 4 +--- src/gallium/drivers/nouveau/nouveau_context.h | 1 - 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/src/gallium/drivers/nouveau/nouveau_buffer.c b/src/gallium/drivers/nouveau/nouveau_buffer.c index e308ff4..904e2cc 100644 ---

Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++------------- src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++-- src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++ src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++--- src/gallium/drivers/nouveau/nv30/nv30_context.c | 4 +-

Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++------------- src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++-- src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++ src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++--- src/gallium/drivers/nouveau/nv30/nv30_context.c | 4

On Wed, Nov 19, 2014 at 12:41 AM, Alexandre Courbot <acourbot at nvidia.com> wrote: > Use the newly-introduced NV_VRAM_DOMAIN() macro to support alternative > VRAM domains for chips that do not use dedicated video memory. > > Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> > --- > src/gallium/drivers/nouveau/nouveau_buffer.c | 6 ++---- >

The main patches are from Christoph. Unfortunately they're a little beyond my understanding of all the vertex-related details, but they generally seemed fine. I'm just going to push these unless someone steps up to review them. Christoph Bumiller (2): nvc0: add support for indirect drawing nvc0: fix translate path for PRIM_RESTART_WITH_DRAW_ARRAYS Ilia Mirkin (1): nouveau: check if

The following 2 patches make it possible to run Mesa programs on GK20A (Tegra K1). GK20A is very similar to GK104, but uses a new (backward-compatible) 3D class as well as the same ISA as GK110 (SM35). Taking these differences into account is sufficient to successfully render simple off-screen buffers. Alexandre Courbot (2): nvc0: add GK20A 3D class nvc0: use SM35 ISA with GK20A

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/gallium/drivers/nouveau/nv50/nv50_context.c | 22 ++++++++++++++++++- src/gallium/drivers/nouveau/nv50/nv50_context.h | 1 + src/gallium/drivers/nouveau/nv50/nv50_vbo.c | 29 ++++++++++++++++++++++++- 3 files changed, 50 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.c

On 24.05.2015 20:25, Ilia Mirkin wrote: > I'm having a bit of trouble tracing through this. What happens if I > have a shader that just does: > > gl_ClipDistance[0] = 1; > gl_CullDistance[0] = 1; > > what does the resulting TGSI look like? (Assuming that clip plane 0 is > enabled.) What about the generated nvc0 code (for the vertex shader)? (hack up a patch for this,

This patch series adds the needed support for this extension to the various parts of mesa to finally enable it for nvc0. Dave Airlie (1): glsl: lower cull_distance into cull_distance_mesa Tobias Klausmann (10): glapi: add GL_ARB_cull_distance mesa/main: add support for GL_ARB_cull_distance mesa/prog: Add varyings for arb_cull_distance mesa/st: add support for GL_ARB_cull_distance

OK, so there's a bunch of stuff in here. The geometry stuff is based on the work started by Bryan Cain and Christoph Bumiller. Patches 01-12: Add support for geometry shaders and fix related issues Patches 13-14: Make it possible for fb clears to operate on texture attachments with an explicit layer set (as is allowed in gl 3.2). Patches 15-17: Make ARB_texture_multisample work