similar to: Mail from yangzhh@mail.ustc.edu.cn.

Displaying 20 results from an estimated 20000 matches similar to: "Mail from yangzhh@mail.ustc.edu.cn."

2012 Feb 01
0
[LLVMdev] Loop Unroll a constant number of times?
On Jan 31, 2012, at 5:16 PM, Ryan Taylor <ryta1203 at gmail.com> wrote: > Is it possible to unroll a loop (forcibly if necessary) with llvm (possibly the -loop-unroll pass) a constant number of times. > > I believe that I read that the -unroll-count=x option was removed, correct? So is there some other way to do this or is this just not possible in llvm? See clang -mllvm
2014 Jan 28
2
[LLVMdev] Loop unrolling opportunity in SPEC's libquantum with profile info
In r200270 I added support to unroll conditional stores in the loop vectorizer. It is currently off pending further benchmarking and can be enabled with "-mllvm -vectorize-num-stores-pred=1”. Furthermore, I added a heuristic to unroll until load/store ports are saturated “-mllvm enable-loadstore-runtime-unroll” instead of the pure size based heuristic. Those two together with a patch that
2014 Jan 21
5
[LLVMdev] Loop unrolling opportunity in SPEC's libquantum with profile info
On 16/01/2014, 23:47 , Andrew Trick wrote: > > On Jan 15, 2014, at 4:13 PM, Diego Novillo <dnovillo at google.com > <mailto:dnovillo at google.com>> wrote: > >> Chandler also pointed me at the vectorizer, which has its own >> unroller. However, the vectorizer only unrolls enough to serve the >> target, it's not as general as the runtime-triggered
2011 Nov 10
1
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
On Tue, 2011-11-08 at 20:24 +0100, Tobias Grosser wrote: > On 11/08/2011 03:36 PM, Hal Finkel wrote: > > On Tue, 2011-11-08 at 12:12 +0100, Tobias Grosser wrote: > >> On 11/08/2011 11:45 AM, Hal Finkel wrote: > >>> I've attached the latest version of my autovectorization patch. > >>> > >>> Working through the test suite has proved to be a
2013 Oct 15
0
[LLVMdev] MI scheduler produce badly code with inline function
On Oct 14, 2013, at 3:27 AM, Zakk <zakk0610 at gmail.com> wrote: > Hi all, > I meet this problem when compiling the TREAM benchmark (http://www.cs.virginia.edu/stream/FTP/Code/) with enable-misched > > The small function will be scheduled as good code, but if opt inline this function, the inline part will be scheduled as bad code. A bug for this is welcome. Pretty soon, I’ll
2012 Jun 28
1
[LLVMdev] buildbot with -vectorize
On Sun, 24 Jun 2012 14:44:45 +0200 Tobias Grosser <tobias at grosser.es> wrote: > On 06/24/2012 02:42 PM, Hal Finkel wrote: > > On Sun, 24 Jun 2012 08:17:32 +0200 > > Tobias Grosser<tobias at grosser.es> wrote: > > > >> On 06/24/2012 05:42 AM, Hal Finkel wrote: > >>> On Thu, 21 Jun 2012 16:25:13 +0200 > >>> Tobias
2018 Jan 09
1
Relationship between clang, opt and llc
//mllvm Options can be dumped by clang -v -help -mllvm and clang -v --help-hidden --> //mllvm Options can be dumped by clang -v -help -mllvm and clang -v --help-hidden -mllvm On Tue, Jan 9, 2018 at 3:09 AM, toddy wang <wenwangtoddy at gmail.com> wrote: > Thanks, Craig. > > So, clang -Xclang -disable-llvm-passes actually disables all the LLVM > passed populated by clang so
2013 Oct 16
3
[LLVMdev] MI scheduler produce badly code with inline function
Hi Andy, thanks for your help!! The scheduled code by method A is same as B when using the new machine model. it's make sense, but there is the another problem, the scheduled code is badly. load/store instruction always reuse the same register Source: #define N 2000000 static double b[N], c[N]; void Scale () { double scalar = 3.0; for (int j=0;j<N;j++) b[j] =
2011 Nov 08
0
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
On 11/08/2011 03:36 PM, Hal Finkel wrote: > On Tue, 2011-11-08 at 12:12 +0100, Tobias Grosser wrote: >> On 11/08/2011 11:45 AM, Hal Finkel wrote: >>> I've attached the latest version of my autovectorization patch. >>> >>> Working through the test suite has proved to be a productive >>> experience ;) -- And almost all of the bugs that it revealed
2018 Jan 09
0
Relationship between clang, opt and llc
Thanks, Craig. So, clang -Xclang -disable-llvm-passes actually disables all the LLVM passed populated by clang so that there is no middle-end optimization on bc files. clang -O2 LULESH.c //clang is the driver, invoking cc1, cc1as, ld //options can be passed through to cc1 directly. //maybe have different names, e.g.
2013 Oct 14
2
[LLVMdev] MI scheduler produce badly code with inline function
Hi all, I meet this problem when compiling the TREAM benchmark ( http://www.cs.virginia.edu/stream/FTP/Code/) with enable-misched The small function will be scheduled as good code, but if opt inline this function, the inline part will be scheduled as bad code. so I rewrite a simple code as attached link (foo.c), and compiled with two different methods: *method A:* *$clang -O3 foo.c -static -S
2011 Sep 06
1
[LLVMdev] major dragonegg improvement
Try -mllvm -disable-unroll-scev if you're curious. There can be some luck involved. If you have the bitcode for the important function, I may be able to convert it into a test case to avoid regressing. I usually grab the unoptimized bitcode as follows: -emit-llvm -mllvm -disable-llvm-optzns -o module.bc -Andy On Sep 6, 2011, at 12:03 PM, Owen Anderson wrote: > Seems very likely to be
2012 Feb 10
2
[LLVMdev] Vectorization: Next Steps
Carl-Philip, The reason that this does not vectorize is that it cannot vectorize the stores; this leaves only the mul-add chains (and some chains with loads), and they only have a depth of 2 (the threshold is 6). If you give clang -mllvm -bb-vectorize-req-chain-depth=2 then it will vectorize. The reason the heuristic has such a large default value is to prevent cases where it costs more to
2012 Feb 01
3
[LLVMdev] Loop Unroll a constant number of times?
Is it possible to unroll a loop (forcibly if necessary) with llvm (possibly the -loop-unroll pass) a constant number of times. I believe that I read that the -unroll-count=x option was removed, correct? So is there some other way to do this or is this just not possible in llvm? -------------- next part -------------- An HTML attachment was scrubbed... URL:
2011 Nov 24
0
[LLVMdev] Turning on/off instruction extensions
On Thu, 2011-11-24 at 15:09 +0100, Pablo Barrio López-Cortijo wrote: > Hi everybody, > > I'm trying to run some examples with different backend options (turning > on/off SSE, 3dnow, or MMX instructions). However, I don't see any > difference in terms of execution time. Does anybody know which language > constructs (in C/C++ preferably) should I try to make these
2018 Jan 09
0
Relationship between clang, opt and llc
Mehdi, I found -unroll-max-count can be passed w/ -mllvm. -dce, -adce, etc, are also dumped by 'opt --help-hidden'. However, they cannot be passed w/ -mllvm. Is this what "You can't schedule passes this way, only set parameters like -unroll-threshold=<uint> etc." means? [twang15 at c89 temp]$ clang++ -mllvm -unroll-max-count=4 -mllvm -dce -save-temps LULESH.cc clang
2011 Nov 28
3
[LLVMdev] Turning on/off instruction extensions
How can I install the patch? Any step-by-step guide? Thanks, Pablo On 24/11/2011, at 15:33, Hal Finkel wrote: > On Thu, 2011-11-24 at 15:09 +0100, Pablo Barrio López-Cortijo wrote: >> Hi everybody, >> >> I'm trying to run some examples with different backend options (turning >> on/off SSE, 3dnow, or MMX instructions). However, I don't see any >>
2013 Oct 16
0
[LLVMdev] MI scheduler produce badly code with inline function
On Oct 15, 2013, at 9:28 PM, Zakk <zakk0610 at gmail.com> wrote: > Hi Andy, thanks for your help!! > The scheduled code by method A is same as B when using the new machine model. > it's make sense, but there is the another problem, the scheduled code is badly. > > load/store instruction always reuse the same register I filed PR17593 with this information. However, I
2018 Jan 09
3
Relationship between clang, opt and llc
Yes that is what he meant. "-dce, -adce, etc" are command line options consumed by tools/opt/opt.cpp to give to the PassManagerBuilder that it creates. The parsing of those options doesn't exist in any of the llvm library code that is linked into clang. Clang has its own code for populating a PassManagerBuilder in tools/clang/lib/CodeGen/BackendUtil.cpp ~Craig On Mon, Jan 8, 2018
2012 Feb 13
0
[LLVMdev] Vectorization: Next Steps
I will test your suggestion, but I designed the test case to load the memory directly into <4 x float> registers. So there is absolutely no permutation and other swizzle or move operations. Maybe the heuristic should not only count the depth but also the surrounding load/store operations. Are the load/store operations vectorized, too? (I designed the test case to completely fit the SSE