similar to: How parameter passing registers are used intelligently?

On Wed, May 25, 2016 at 3:53 AM, Hal Finkel <hfinkel at anl.gov> wrote: > > ------------------------------ > > *From: *"vivek pandya" <vivekvpandya at gmail.com> > *To: *"Quentin Colombet" <qcolombet at apple.com> > *Cc: *"Hal Finkel" <hfinkel at anl.gov>, "llvm-dev" <llvm-dev at lists.llvm.org>, >

----- Original Message ----- > From: "vivek pandya" <vivekvpandya at gmail.com> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: "llvm-dev" <llvm-dev at lists.llvm.org>, "Matthias Braun" > <matze at braunis.de>, "Mehdi Amini" <mehdi.amini at apple.com>, "Quentin > Colombet" <qcolombet at

On Wed, May 25, 2016 at 8:44 AM, Hal Finkel <hfinkel at anl.gov> wrote: > > ------------------------------ > > *From: *"vivek pandya" <vivekvpandya at gmail.com> > *To: *"Hal Finkel" <hfinkel at anl.gov> > *Cc: *"llvm-dev" <llvm-dev at lists.llvm.org>, "Matthias Braun" < > matze at braunis.de>, "Mehdi

Hello, I have written following code to check each register if it is used by machineFunction or not : MachineRegisterInfo *MRI = &MF.getRegInfo(); TargetRegisterInfo *TRI = (TargetRegisterInfo *)MF.getSubtarget().getRegisterInfo(); const TargetMachine &TM = MF.getTarget(); const MCRegisterInfo *MCRI = TM.getMCRegisterInfo(); DEBUG(dbgs() << "Function Name : " <<

> On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > Dear Mentors, > > Please help me to understand our plan to implement Interprocedural Register allocator by propogating register usage info. While writing this mail I am considering all previous discussion over llvm-dev and IRC. > > 1) A MachineFunction pass to be executed POST-RA to

Dear Mentors, Please help me to understand our plan to implement Interprocedural Register allocator by propogating register usage info. While writing this mail I am considering all previous discussion over llvm-dev and IRC. 1) A MachineFunction pass to be executed POST-RA to collect the information about the used Registers. 2) An Immutable pass which will store reg usage info collected by

> On May 24, 2016, at 10:08 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > > On Wed, May 25, 2016 at 10:08 AM, Mehdi Amini <mehdi.amini at apple.com <mailto:mehdi.amini at apple.com>> wrote: > >> On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com <mailto:vivekvpandya at gmail.com>> wrote: >> >> Dear

Sent from my iPhone > On May 24, 2016, at 11:04 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > >> On Wed, May 25, 2016 at 10:46 AM, Mehdi Amini <mehdi.amini at apple.com> wrote: >> >>> On May 24, 2016, at 10:08 PM, vivek pandya <vivekvpandya at gmail.com> wrote: >>> >>> >>> >>> On Wed, May 25,

*Vivek Pandya* On Wed, May 18, 2016 at 11:25 PM, Quentin Colombet <qcolombet at apple.com> wrote: > > On May 18, 2016, at 10:46 AM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > > *Vivek Pandya* > > > On Wed, May 11, 2016 at 4:01 PM, Hal Finkel <hfinkel at anl.gov> wrote: > >> >> ------------------------------ >> >>

----- Original Message ----- > From: "vivek pandya" <vivekvpandya at gmail.com> > To: "Quentin Colombet" <qcolombet at apple.com> > Cc: "Hal Finkel" <hfinkel at anl.gov>, "llvm-dev" > <llvm-dev at lists.llvm.org>, "Matthias Braun" <matze at braunis.de>, > "Mehdi Amini" <mehdi.amini at

On Wed, May 25, 2016 at 10:08 AM, Mehdi Amini <mehdi.amini at apple.com> wrote: > > On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > Dear Mentors, > > Please help me to understand our plan to implement Interprocedural > Register allocator by propogating register usage info. While writing this > mail I am considering all previous

On Wed, May 25, 2016 at 10:46 AM, Mehdi Amini <mehdi.amini at apple.com> wrote: > > On May 24, 2016, at 10:08 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > > On Wed, May 25, 2016 at 10:08 AM, Mehdi Amini <mehdi.amini at apple.com> > wrote: > >> >> On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com> wrote:

*Vivek Pandya* On Wed, May 11, 2016 at 4:01 PM, Hal Finkel <hfinkel at anl.gov> wrote: > > ------------------------------ > > *From: *"vivek pandya" <vivekvpandya at gmail.com> > *To: *"Mehdi Amini" <mehdi.amini at apple.com> > *Cc: *"Hal Finkel" <hfinkel at anl.gov>, "Quentin Colombet" < > qcolombet at

----- Original Message ----- > From: "Mehdi Amini" <mehdi.amini at apple.com> > To: "vivek pandya" <vivekvpandya at gmail.com> > Cc: "Hal Finkel" <hfinkel at anl.gov>, "llvm-dev" > <llvm-dev at lists.llvm.org>, "Matthias Braun" <matze at braunis.de>, > "Quentin Colombet" <qcolombet at

----- Original Message ----- > From: "vivek pandya" <vivekvpandya at gmail.com> > To: "Matthias Braun" <matze at braunis.de> > Cc: "Hal Finkel" <hfinkel at anl.gov>, "llvm-dev" > <llvm-dev at lists.llvm.org> > Sent: Wednesday, May 11, 2016 1:14:07 PM > Subject: Re: [llvm-dev] [GSoC 2016] Interprocedural Register

> On May 18, 2016, at 11:00 AM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > > Vivek Pandya > > > On Wed, May 18, 2016 at 11:25 PM, Quentin Colombet <qcolombet at apple.com <mailto:qcolombet at apple.com>> wrote: > >> On May 18, 2016, at 10:46 AM, vivek pandya <vivekvpandya at gmail.com <mailto:vivekvpandya at

*Vivek Pandya* On Wed, May 11, 2016 at 10:02 AM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > *Vivek Pandya* > > > On Wed, May 11, 2016 at 9:43 AM, Mehdi Amini <mehdi.amini at apple.com> > wrote: > >> >> On May 10, 2016, at 6:06 PM, Hal Finkel <hfinkel at anl.gov> wrote: >> >> >> >>

Yes there is also MachineRegisterInfo::UsedPhysRegMask which should be the union of all regmasks in the function. > On May 11, 2016, at 10:47 AM, Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > > From: "Matthias Braun" <matze at braunis.de> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: "vivek pandya"

> On May 11, 2016, at 3:31 AM, Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > From: "vivek pandya" <vivekvpandya at gmail.com> > To: "Mehdi Amini" <mehdi.amini at apple.com> > Cc: "Hal Finkel" <hfinkel at anl.gov>, "Quentin Colombet" <qcolombet at apple.com>, "llvm-dev"

Dear Community, Please find summary of work done during this week as follow: Implementation: ============ During this week we have identified a bug in IPRA due to not considering RegMask of function calls in given machine function. The same bug on AArch64 has been reported by Chad Rosier and more detailed description can be found at https://llvm.org/bugs/show_bug.cgi?id=28144 . To fix this bug