Displaying 20 results from an estimated 500 matches similar to: "x86: How to Force 2-byte `jmp` instruction in lowering"
2016 Jun 22
3
x86: How to Force 2-byte `jmp` instruction in lowering
On Wed, Jun 22, 2016 at 6:05 AM Nirav Davé <niravd at google.com> wrote:
> This appears to work:
>
> auto Target = OutContext.createLinkerPrivateTempSymbol();
>
> with
>
> auto Target = OutContext.createTempSymbol();
>
> -Nirav
>
>
Thanks Nirav -- I tried this but I'm still getting a "jmpq <address>" with
this incantation when I load and
2016 Jun 22
0
x86: How to Force 2-byte `jmp` instruction in lowering
Hmm. Odd. I just rebuilt from scratch and it seems to work with
the test/CodeGen/X86/xray-attribute-instrumentation.ll test case outputing
straight to obj:
llc -filetype=obj -o ~/a.o -mtriple=x86_64-apple-macosx <
test/CodeGen/X86/xray-attribute-instrumentation.ll
What test case are you using?
In any case, the issue appears to be that llvm doesn't realize that the
target address is
2016 Jun 22
2
x86: How to Force 2-byte `jmp` instruction in lowering
Thanks Nirav,
I can confirm that this works when I do the compile with llc, but then when
linking to an executable with clang (patched with
http://reviews.llvm.org/D20352 and compiler-rt patched with
http://reviews.llvm.org/D21612) on Linux, I'm getting something different.
Here's a sample of the transcript, and what I'm seeing:
--->8 clang invocation 8<---
[16-06-23 3:33:42]
2016 Jun 22
0
x86: How to Force 2-byte `jmp` instruction in lowering
Peter suggested just writing out '.byte 0xeb, 0x09' and that allowed the
jump instruction to bypass the relaxation, so that fixes my immediate
problem. The question still stands though whether it should be possible to
do through the instruction builder interface.
Cheers
On Wed, Jun 22, 2016 at 10:40 AM Dean Michael Berris <dberris at google.com>
wrote:
> Thanks Nirav,
>
>
2016 Aug 05
2
XRay: Demo on x86_64/Linux almost done; some questions.
Hi Dean,
I have a question for 32-bit platforms. I see in the code that you used the
following in compiler-rt/trunk/lib/xray/xray_interface_internal.h :
struct XRaySledEntry {
uint64_t Address;
uint64_t Function;
unsigned char Kind;
unsigned char AlwaysInstrument;
unsigned char Padding[14]; // Need 32 bytes
};
And the peer code in llvm/trunk/lib/Target/X86/X86MCInstLower.cpp :
void
2017 Nov 21
2
question about xray tls data initialization
with some dirty hack , I've made xray runtime 'built' on windows ,
but unfortunately I haven't enough knowledge about linker and the
runtime, and finally built executable didn't run. I'd like to share
my changes here , hopes somebody help me to make it run on windows.
in AsmPrinter, copy/paster xray for coff target
InstMap =
2017 Nov 16
2
question about xray tls data initialization
I'm learning the xray library and try if it can be built on windows, in
xray_fdr_logging_impl.h
line 152 , comment written as
// Using pthread_once(...) to initialize the thread-local data structures
but at line 175, 183, code written as
thread_local pthread_key_t key;
// Ensure that we only actually ever do the pthread initialization once.
thread_local bool UNUSED Unused = [] {
2010 May 11
0
[LLVMdev] How does SSEDomainFix work?
On May 10, 2010, at 9:07 PM, NAKAMURA Takumi wrote:
> Hello. This is my 1st post.
ようこそ!
> I have tried SSE execution domain fixup pass.
> But I am not able to see any improvements.
Did you actually measure runtime, or did you look at assembly?
> I expect for the example below to use MOVDQA, PAND &c.
> (On nehalem, ANDPS is extremely slower than PAND)
Are you sure? The
2011 May 02
1
default context overrides context of peer
Hello,
I upgraded from asterisk 1.6.2.7 to asterisk 1.6.2.17.
I have context=defcontext set in sip.conf. For each peer I have
context=outcontext in the peer definition since I want outgoing calls
from registered SIP peers to go through context 'outcontext'. This
used to work in the older version (1.6.2.7), but after upgrading this
has stopped working. Now outgoing calls are going to
2016 Aug 04
2
XRay: Demo on x86_64/Linux almost done; some questions.
> On 4 Aug 2016, at 06:27, Serge Rogatch <serge.rogatch at gmail.com> wrote:
>
> Hi Dean,
>
> I have a question about the following piece of code in compiler-rt/trunk/lib/xray/xray_trampoline_x86.S :
> movq _ZN6__xray19XRayPatchedFunctionE(%rip), %rax
> testq %rax, %rax
> je .Ltmp0
>
> // assume that %r10d has the function id.
> movl %r10d,
2017 Nov 23
2
question about xray tls data initialization
On Wed, Nov 22, 2017 at 10:37 AM, Dean Michael Berris
<dean.berris at gmail.com> wrote:
>
> On 22 Nov 2017, at 02:32, comic fans <comicfans44 at gmail.com> wrote:
>
> with some dirty hack , I've made xray runtime 'built' on windows ,
>
>
> \o/
with more test, I've found that trampoline didn't got built for windows :/
currently cmake didn't
2014 Sep 10
13
[LLVMdev] Please benchmark new x86 vector shuffle lowering, planning to make it the default very soon!
On Tue, Sep 9, 2014 at 11:39 PM, Chandler Carruth <chandlerc at google.com> wrote:
> Awesome, thanks for all the information!
>
> See below:
>
> On Tue, Sep 9, 2014 at 6:13 AM, Andrea Di Biagio <andrea.dibiagio at gmail.com>
> wrote:
>>
>> You have already mentioned how the new shuffle lowering is missing
>> some features; for example, you explicitly
2011 Sep 17
0
[LLVMdev] Problem with Linux PPC64 assembly output.
The latest binutils (2.21.2) assembler for the PPC64 complains about the .size
directive emitted by LLVM as not containing an absolute expression.
An example:
__umodsi3:
.quad .L.__umodsi3,.TOC. at tocbase
.previous
.L.__umodsi3:
mflr 0
[snip]
mtlr 0
blr
.Ltmp0:
.size __umodsi3, .Ltmp0-__umodsi3
The correct size expression should be
2010 May 11
2
[LLVMdev] How does SSEDomainFix work?
Hello. This is my 1st post.
I have tried SSE execution domain fixup pass.
But I am not able to see any improvements.
I expect for the example below to use MOVDQA, PAND &c.
(On nehalem, ANDPS is extremely slower than PAND)
Please tell me if something would be wrong for me.
Thank you.
Takumi
Host: i386-mingw32
Build: trunk at 103373
foo.ll:
define <4 x i32> @foo(<4 x i32> %x,
2016 Jun 29
2
x86: How to Force 2-byte `jmp` instruction in lowering
On Wed, Jun 22, 2016 at 9:36 AM, Nirav Davé <llvm-dev at lists.llvm.org> wrote:
> In any case, the issue appears to be that llvm doesn't realize that the
> target address is resolved and erroneously applies branch relaxation to the
> jump. I don't know why a linker private symbol would make a difference.
>
Relaxation is the process of *shortening* jumps that can be
2012 Oct 26
5
[LLVMdev] Debug information under windows
Hello,
Recently I found binaries produced with LLVM impossible to debug under
Windows. This was probably related to the following bug:
http://llvm.org/bugs/show_bug.cgi?id=13636
Asm generated from .ll files revealed that some offsets to debug
information were incorrect: they were absolute instead of relative to
their sections.
Following patch seemed to have repaired the problem, so I'm
2014 Jan 31
5
[LLVMdev] emitting function stub for mips16 floating point patch
I'm rewriting this patch for the stubs to not use outputing of raw text.
Generating the instructions is very straightforward and that part is done.
I'm translating the actual function now.
How do you emit an .ent or .globl from asm printer?
.type ?
.end ??
.section ???
I'm studying the classes now but it should be simple to do so if you
know, you can save me some time
because this
2019 Aug 31
3
Usage of the jumptable attribute
Hello everyone,
I'm new to LLVM (which is a really great project by the way) and I hope
this is the right place for my question.
In the LLVM Language Reference Manual I found the "jumptable" function
attribute, which seems to be exactly what I need for my project (where I
want to add one level of indirection to every function call), but I have
trouble figuring out, how to use
2020 Aug 31
2
Vectorization of math function failed?
Hi,
After reading https://llvm.org/docs/Vectorizers.html#vectorization-of-function-calls
I decided to write the following C++ program:
#include <cmath>
using v4f32 = float __attribute__((__vector_size__(16)));
v4f32 fct1(v4f32 x)
{
v4f32 y;
y[0] = std::sin(x[0]);
y[1] = std::sin(x[1]);
y[2] = std::sin(x[2]);
y[3] = std::sin(x[3]);
return y;
}
v4f32 fct2(v4f32 x)
{
v4f32 y;
2011 Jun 06
0
[LLVMdev] Understanding SelectionDAG construction
Hi Ankur,
> The flags "-view-sched-dags".. described in the doc doesn't seem to work. (
> "llc -help" doesn't list it ).
as far as I remember, displaying DAGs during compilation is only enabled
in "debug builds" [1] of LLVM. You probably have to re-configure and
re-compile LLVM to enable this feature.
Best regards,
Christoph
[1]