similar to: Updating RegMask inline

On Sat, May 28, 2016 at 12:21 AM, Mehdi Amini <mehdi.amini at apple.com> wrote: > > > On May 27, 2016, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com> > wrote: > > > > Hello Mentors, > > > > I have completed writing simple register mask calculator pass, an > immutable pass that stores RegMasks and provides API to query them, and a >

> On May 27, 2016, at 6:55 PM, vivek pandya via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > > On Sat, May 28, 2016 at 12:23 AM, vivek pandya <vivekvpandya at gmail.com <mailto:vivekvpandya at gmail.com>> wrote: > > > On Sat, May 28, 2016 at 12:21 AM, Mehdi Amini <mehdi.amini at apple.com <mailto:mehdi.amini at apple.com>> wrote:

On Sat, May 28, 2016 at 12:23 AM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > On Sat, May 28, 2016 at 12:21 AM, Mehdi Amini <mehdi.amini at apple.com> > wrote: > >> >> > On May 27, 2016, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com> >> wrote: >> > >> > Hello Mentors, >> > >> > I have

> On May 27, 2016, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com> wrote: > > Hello Mentors, > > I have completed writing simple register mask calculator pass, an immutable pass that stores RegMasks and provides API to query them, and a target specific pass for X86 target which currently iterates through all MI in given MF and if a call instruction is found then it

On Sat, May 28, 2016 at 7:29 AM, Matthias Braun <matze at braunis.de> wrote: > > On May 27, 2016, at 6:55 PM, vivek pandya via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > > > On Sat, May 28, 2016 at 12:23 AM, vivek pandya <vivekvpandya at gmail.com> > wrote: > >> >> >> On Sat, May 28, 2016 at 12:21 AM, Mehdi Amini

static void setXXX(MachineInstr &MI, ...) { for (MachineOperand &MO : MI.operands()) { if (MO.isRegMask()) MO.setRegMask(...); } } > On May 27, 2016, at 7:02 PM, vivek pandya via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > > On Sat, May 28, 2016 at 7:29 AM, Matthias Braun <matze at braunis.de <mailto:matze at braunis.de>> wrote: >

Sent from my iPhone > On May 27, 2016, at 6:55 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > >> On Sat, May 28, 2016 at 12:23 AM, vivek pandya <vivekvpandya at gmail.com> wrote: >> >> >>> On Sat, May 28, 2016 at 12:21 AM, Mehdi Amini <mehdi.amini at apple.com> wrote: >>> >>> > On May 27, 2016, at 11:49

Sent from my iPhone > On May 27, 2016, at 7:02 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > >> On Sat, May 28, 2016 at 7:29 AM, Matthias Braun <matze at braunis.de> wrote: >> >>> On May 27, 2016, at 6:55 PM, vivek pandya via llvm-dev <llvm-dev at lists.llvm.org> wrote: >>> >>> >>> >>> On

On Sat, May 28, 2016 at 7:33 AM, Matthias Braun <matze at braunis.de> wrote: > static void setXXX(MachineInstr &MI, ...) { > for (MachineOperand &MO : MI.operands()) { > if (MO.isRegMask()) > MO.setRegMask(...); > } > } > > Ok this is what Mehdi Amini suggested. I will do that, but just to note this will add method to MO so this change is not completely

Dear Community, Please find summary of work done during this week as follow: Implementation: ============ During this week we have identified a bug in IPRA due to not considering RegMask of function calls in given machine function. The same bug on AArch64 has been reported by Chad Rosier and more detailed description can be found at https://llvm.org/bugs/show_bug.cgi?id=28144 . To fix this bug

On Wed, Jun 15, 2016 at 6:16 AM, Quentin Colombet <qcolombet at apple.com> wrote: > Hi Vivek, > > How much of the slow down on runtime comes from the different layout of > the function in the asm file? (I.e., because of the dummy scc pass.) > > Hello Quentin, Please do not consider previous results as there was a major bug in RegMask calculation due to not considering

Dear Community, The patch for Interprocedural Register Allocation has been committed now , thanks to Mehdi Amini for that. We would like you to play with it and let us know your views and more importantly ideas to improve it. The test-suite run has indicated some non trivial issue that results in run time failure of the programs, we will be investigating it more. Here are some stats :

Hello Clang and LLVM Devs, I have been working to add support for an attribute in clang and LLVM that helps user to guide interprocedural register allocation. But the use case I am having is very limited and thus I belieave it is good to have discussion on this before sending a patch. So for IPRA we have a situation where a function is calling a function which is written in assembly and it is

Dear community, This is to brief you the progress of Interprocedural Register Allocation, for those who are interested to see the progress in terms of code please consider http://reviews.llvm.org/D20769 This patch contains simple infrastructure to propagate register usage information of callee to caller in call graph. The code generation order is changed to follow bottom up order on call graph ,

Sent from my iPhone > On May 24, 2016, at 11:04 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > >> On Wed, May 25, 2016 at 10:46 AM, Mehdi Amini <mehdi.amini at apple.com> wrote: >> >>> On May 24, 2016, at 10:08 PM, vivek pandya <vivekvpandya at gmail.com> wrote: >>> >>> >>> >>> On Wed, May 25,

> On May 24, 2016, at 10:08 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > > On Wed, May 25, 2016 at 10:08 AM, Mehdi Amini <mehdi.amini at apple.com <mailto:mehdi.amini at apple.com>> wrote: > >> On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com <mailto:vivekvpandya at gmail.com>> wrote: >> >> Dear

On Wed, May 25, 2016 at 10:08 AM, Mehdi Amini <mehdi.amini at apple.com> wrote: > > On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > Dear Mentors, > > Please help me to understand our plan to implement Interprocedural > Register allocator by propogating register usage info. While writing this > mail I am considering all previous

----- Original Message ----- > From: "Mehdi Amini" <mehdi.amini at apple.com> > To: "vivek pandya" <vivekvpandya at gmail.com> > Cc: "Hal Finkel" <hfinkel at anl.gov>, "llvm-dev" > <llvm-dev at lists.llvm.org>, "Matthias Braun" <matze at braunis.de>, > "Quentin Colombet" <qcolombet at

> On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > Dear Mentors, > > Please help me to understand our plan to implement Interprocedural Register allocator by propogating register usage info. While writing this mail I am considering all previous discussion over llvm-dev and IRC. > > 1) A MachineFunction pass to be executed POST-RA to

On Wed, May 25, 2016 at 10:46 AM, Mehdi Amini <mehdi.amini at apple.com> wrote: > > On May 24, 2016, at 10:08 PM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > > On Wed, May 25, 2016 at 10:08 AM, Mehdi Amini <mehdi.amini at apple.com> > wrote: > >> >> On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com> wrote: