similar to: IfConversion and representation of predicates

Assume an architecture that has multiple condition code registers, e.g., powerpc. Now assume that there are predicate instructions like thumb2, but can specify which condition code register they refer to. Now also assume that these predicate instructions themselves are predicatible, if executed they change the current predication state. Can LLVM handle multiple levels of predication? When is

Hi, I am trying to implement support for an if-conversion pass in a backend for the ADRES CGRA architecture. >From studying the existing IfConversion pass, I observed the following: - The PredicateInstruction method is meant to insert guards into conditional instructions. - This method assumes that one will be able to get the predicate from the conditional branch instruction on which

On Tue, Oct 10, 2017 at 4:48 PM, Friedman, Eli via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 10/9/2017 3:10 AM, Gaël Jobin via llvm-dev wrote: > > Hi all, > > I got a silly bug when compiling our project with the latest Clang. Here's > the outputted assembly: > > tst r3, #255 > strbeq r6, [r7] > ldreq r6, [r4, r6, lsl #2] > strne r6, [r7, #4]

Hello! The if-converter tries to match 'Simple' patterns looking like this: // Simple (split, no rejoin): // EBB // | \_ // | | // | TBB---> exit // | // FBB The IfConverter::ValidSimple method (lib/CodeGen/IfConversion.cpp:461) checks if TBB matches this pattern. It basically does this by simply checking if AnalyseBranch fails on

On Tue, Jan 10, 2017 at 2:31 AM, Peter A Jonsson <pj at sics.se> wrote: > Hi Kyle, > > my apologies for mailing you directly but it seems new user creation is > disabled on the llvm bugzilla. > > We sometime lose edges during IfConversion of diamonds and it’s not > obvious how to reproduce on an upstream target. The documentation for > HasFallThrough says *may*

Hi all, I am using llvm backend to generate binary for a specific accelerator. I would like to convert instructions into predicated form when instructions are still in SSA form. It looks like that ifconversion execution flow is different when instructions are in SSA form. However, I am encountering many problems (specially with registers) when I use it before register allocation. I was wondering

Evan, et al., I've come across a small issue when using the if conversion pass in PPC to generate conditional returns. Here's a small example: ** Before if conversion ** BB#0: derived from LLVM BB %entry %R3<def> = LI 0 %CR0<def> = CMPLWI %R3, 0 BCC 68, %CR0, <BB#3> Successors according to CFG: BB#3(16) BB#1(16) BB#1: derived from LLVM BB

Hello. Because I experience optimizations (DCE, OoO schedule) which mess the correct semantics of the list of instructions lowered in ISelLowering from the VSELECT LLVM instruction, and these bad transformations happen even before scheduling, at later I-sel subpasses, I try to fix this problem by lowering VSELECT to only one pseudo-instruction and LATER translate it to a list of

Hi all, I got a silly bug when compiling our project with the latest Clang. Here's the outputted assembly: > tst r3, #255 > strbeq r6, [r7] > ldreq r6, [r4, r6, lsl #2] > strne r6, [r7, #4] > ldr r6, [r4, r6, lsl #2] > bx r6 For the code to execute correctly, either the _ldr_ should be a _ldrne_ instruction or the _ldreq_ instruction should be removed. The error seems to

OK, I've hacked configure so that it simply checks that it can link with openssl. Now, when I run make, it dies on authfile.c while trying to include the non-existent headers openssl/rc5.h and openssl/idea.h. I built my installation of openssl without those algorithms in order to avoid commercial licensing issues. The following diff band-aids the problem, but I think it's down-stream of

Hi All, How can I run the IfConversion pass in JIT to optimize my code for ARM as a Target Architecture? -- View this message in context: http://llvm.1065342.n5.nabble.com/Machine-level-IfConversion-for-ARM-tp69513.html Sent from the LLVM - Dev mailing list archive at Nabble.com.

Hi. On our system we have a problems with recursive IfConversion algorithm. Here is the patch for making it loop-based. Or do I need to send it to some other mail-list? -- Best regards, Andrew Zhogin. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130701/f526e1f0/attachment.html> -------------- next

Here is a patch of changes from the proof-reading of the R reference manual, made against the current cvs. regards -- Brian Gough Network Theory Ltd -- Publishing Free Software Manuals 15 Royal Park Bristol BS8 3AL United Kingdom Tel: +44 (0)117 3179309 Fax: +44 (0)117 9048108 Web: http://www.network-theory.co.uk/ Index: src/library/base/man/Arithmetic.Rd

I need to do some analysis, in which I have to selectively convert IFs. I am trying to find a way to call this optimization pass from the JIT code, thus I can decide which branches to convert and which to keep. Apparently I cannot do this using a pass manager. -- View this message in context: http://llvm.1065342.n5.nabble.com/Machine-level-IfConversion-for-ARM-tp69513p69622.html Sent from the

The patch below attempts to correct some unclear sentences in the R documentation. In the case of coplot.Rd it wasn't clear whether "shingle" bar had a special meaning or was a typo for "single". I've just put a comment in that case. regards -- Brian Gough Network Theory Ltd -- Publishing Free Software Manuals 15 Royal Park Bristol BS8 3AL United Kingdom Tel: +44

Morten, I've applied these patches. Thanks for the updates! Reid. On Mon, 2004-11-15 at 01:26, Morten Ofstad wrote: > Hi, > > when I updated the sources today there were several small problems that > stopped the windows version from compiling, here are the patches > > m. > > > ______________________________________________________________________ > Index:

This patch (apologies for the size) updates zlib/* to the files that ship with zlib 1.1.3. Index: zlib/ChangeLog =================================================================== RCS file: /cvsroot/rsync/zlib/ChangeLog,v retrieving revision 1.1 diff -u -r1.1 ChangeLog --- zlib/ChangeLog 7 May 1998 06:19:41 -0000 1.1 +++ zlib/ChangeLog 30 Jan 2002 01:12:41 -0000 @@ -1,6 +1,54 @@ ChangeLog

On May 24, 2011, at 12:02 AM, roy rosen wrote: > Hi, > > I was wondering if LLVM supports predicates and conditional execution. > Something like we have in IA64. > There is a register class of predicates and then every instruction may > be predicated by a register from this class. > For example: > > cmp_less p, x, y // p is a predicate which gets the result of x <

https://bugzilla.netfilter.org/cgi-bin/bugzilla/show_bug.cgi?id=39 beo@sgs.o.se changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |beo@sgs.o.se Status|RESOLVED |REOPENED Resolution|FIXED |

Here's a unified diff, proposed by Christos Zoulas (with a little reworking to get the configure.in part a bit cleaner). The main target of the patches are NetBSD compatability, although there are some changes making if (pointer X) into if (X != NULL) as well. Christos also proposed a change to Makefile.in, but I'll send that as a seperate mail. Thanks, David Index: configure.in