similar to: Terminators in MachineBasicBlock

Displaying 20 results from an estimated 10000 matches similar to: "Terminators in MachineBasicBlock"

2016 Mar 24
1
Terminators in MachineBasicBlock
So in your example there are two terminators in the basic block (`br if` and `br else`)? 2016-03-24 14:15 GMT-04:00 Quentin Colombet <qcolombet at apple.com>: > Hi, > > > On Mar 24, 2016, at 10:58 AM, Tom Chen via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > > > Hi, > > Why does a MachineBasicBlock have multiple terminator instructions >
2016 Mar 24
0
Terminators in MachineBasicBlock
Hi, > On Mar 24, 2016, at 10:58 AM, Tom Chen via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi, > Why does a MachineBasicBlock have multiple terminator instructions (unlike BasicBlock, which can only have one) ? Think of it as predicated instructions. E.g., bool = icmp if bool : br if br else As for why, we could indeed have split those terminators into several basic
2020 Jul 11
3
is a MachineBasicBlock a kind of superblock?
MachineBasicBlock allows for multiple terminators. Unconditional branches and returns are marked as terminators; the MIPS backend also marks conditional branches as terminators. The MachineBasicBlock then has a helper function getFirstTerminator which iterates from the first terminator to the end of the MBB. So it seems to me that an MBB is a kind of superblock, single entrance and multiple side
2010 Oct 15
1
[LLVMdev] how to get MachineBasicBlock of a BasicBlock
Also note: there may be multiple MachineBasicBlock's for a single BasicBlock. - David M On Fri, Oct 15, 2010 at 4:59 AM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: > I don't think you can. > > The BasicBlock is a member of MachineBasicBlock. It is not inherited, > so it cannot be cast. The number of the MachineBasicBlock is not the > same as any BasicBlock values.
2010 Oct 15
0
[LLVMdev] how to get MachineBasicBlock of a BasicBlock
I don't think you can. The BasicBlock is a member of MachineBasicBlock. It is not inherited, so it cannot be cast. The number of the MachineBasicBlock is not the same as any BasicBlock values. So MachineFunction::getMachineBasicBlock( BasicBlock::{get the number} ) cannot work. I do not see much in the basic block which can identify it. So you can search for it. typedef struct findBlock {
2010 Oct 15
2
[LLVMdev] how to get MachineBasicBlock of a BasicBlock
Hello, we can get BasicBlock from MachineBasicBlock through MachineBasicBlock::getBasicBlock() function, but how can I get MachineBasicBlock of a BasicBlock? Thank you!
2011 Nov 30
2
[LLVMdev] Problem using a label to a MachineBasicBlock
Hi all, I think that I came somewhat closer to a solution for splitting a MachineBasicBlock for a PSEUDO_CALL_R instruction and having a label to the new MBB: For following piece of code: --- typedef int callme_t(int a, int b); callme_t* c01; int foo(int a, int b) { return c01(a,b); // MachineBasicBlock will be split at call instruction } --- I have initially following correspondence: BB1
2012 Mar 22
1
[LLVMdev] Problem using a label to a MachineBasicBlock
Can you please post the code to split a MachineBasicBlock? I am trying to split a MachineBasicBlock at a specific instruction in the MBB, let us say, into MBB1 and MBB2. This instruction should go into MBB2. Also MBB1 should have an unconditional branch to MBB2 as the terminator. (quite similar to splitBasicBlock in BasicBlock.cpp) Meanwhile, I am trying to come up with a variant of
2008 Sep 30
2
[LLVMdev] Inserting MachineBasicBlock(s) before a MachineBasicBlock
I want to be able to do two things with LLVM (both just before code emission): 1. Insert a MachineBasicBlock just before a MachineBasicBlock. There is a function called AddPredecessor(). However, the comment says that it does not update the actual CFG. I want to redirect all CFG edges that are incoming to this MachineBasicBlock to the new one I create, and add just one outgoing edge (no branch)
2019 Feb 22
2
How to get Greedy RA to not spill results of trivially rematerializable instructions
Quentin, thanks so much for looking at this. I should have noticed the other spill to the same stack slot if control doesn't flow through block 2 (line 32). I am sorry to have wasted your time. For the original issue, we won't be able to do anything for the spills, but we can clean up the issue where we materialize the same constant multiple times into the same register just to spill it.
2019 Feb 21
2
How to get Greedy RA to not spill results of trivially rematerializable instructions
Thanks for the reduced test case, I’ll try to take a look by the end of the week. > On Feb 20, 2019, at 6:53 PM, Nemanja Ivanovic <nemanja.i.ibm at gmail.com> wrote: > > Finally managed to reduce this to something manageable: https://godbolt.org/z/Hw529k <https://godbolt.org/z/Hw529k> > > On line 40 of the output, we have a load-immediate to put zero into R3. Then we
2015 Dec 04
2
analyzePhysReg question
> On Dec 3, 2015, at 5:36 PM, Quentin Colombet via llvm-dev <llvm-dev at lists.llvm.org> wrote: > >> >> On Dec 3, 2015, at 5:11 PM, Smith, Kevin B <kevin.b.smith at intel.com <mailto:kevin.b.smith at intel.com>> wrote: >> >> >> >>> -----Original Message----- >>> From: Quentin Colombet [mailto:qcolombet at apple.com
2015 Dec 04
2
analyzePhysReg question
>-----Original Message----- >From: Quentin Colombet [mailto:qcolombet at apple.com] >Sent: Thursday, December 03, 2015 4:43 PM >To: Smith, Kevin B <kevin.b.smith at intel.com> >Cc: llvm-dev at lists.llvm.org >Subject: Re: [llvm-dev] analyzePhysReg question > > >> On Dec 3, 2015, at 4:35 PM, Smith, Kevin B via llvm-dev <llvm- >dev at lists.llvm.org>
2002 Nov 08
1
[LLVMdev] Basicblock and MachineBasicBlock
Dear LLVM, I was wondering what's the difference between BasicBlock and MachineBasicBlock in LLVM. If I want to solve a data flow equation problem, which one should I use? Thanks, Jerry
2019 Feb 21
2
How to get Greedy RA to not spill results of trivially rematerializable instructions
I do have a reproducer, but it's not for the faint of heart :) This is from a large and messy C file (Perlbench's regexec.c), reduced by bugpoint down to 1050 lines of IR. Perhaps I can paste it on pastebin. Just for fun, I added some debug dumps for machine instructions that spill registers (i.e. return non-zero from MachineInstr::getFoldedSpillSize()) that are fed by load-immediates and
2014 Dec 08
2
[LLVMdev] Virtual register problem in X86 backend
Hi, I'm having trouble using virtual register in the X86 backend. I implemented a new intrinsic and I use a custom inserter. The goal of the intrinsic is to set the content of the stack to zero at the end of each function. Here is my code: MachineBasicBlock * X86TargetLowering::EmitBURNSTACKWithCustomInserter( MachineInstr *MI, MachineBasicBlock
2010 Oct 20
1
[LLVMdev] MachineBasicBlock insertion
Hi all, I am really stumped on a problem for long. I could not figure out why. That is why i am here. OK, here is the problem: I tried to insert a MachineBasicBlock into a function. Here is the code snippet: // insert a machine basic block with the error_label into MF and before I // Pred is the predecessor of the block to be inserted // the new basic block is inserted right before I void
2014 Sep 25
2
[LLVMdev] MachineRegisterInfo use_iterator/reg_iterator?
Thanks Quentin. I'm trying to examine from the operands of the return instruction, and then to get the last assignment of those. I thought use_iterator/reg_iterator may suit better than just loop through the machine basicblock in the reverse order. Cheng-Chih On Thu, Sep 25, 2014 at 1:51 PM, Quentin Colombet <qcolombet at apple.com> wrote: > Hi Cheng-Chih, > > On Sep 25,
2010 Jun 24
1
[LLVMdev] Why the same MachineBasicBlock converted to binary code twice?
While debugging something, I found this strange-looking situation in JIT on 32-bit platform. For the particular BasicBlock function StartMachineBasicBlock is called twice with the same MachineBasicBlock object. This generates two memory addresses for binary code for this BasicBlock. Why such situation can happen? Which memory address would be the "real" address of this BasicBlock?
2014 Dec 10
2
[LLVMdev] Virtual register problem in X86 backend
Hi, Thx for your help... Here is the IR code: ; ModuleID = 'foo_bar.c' target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [6 x i8] c"MAIN\0A\00", align 1 ; Function Attrs: nounwind uwtable define i32 @main(i32 %argc, i8** %argv) #0 { entry: %retval = alloca i32,