similar to: define an intrinsic function as terminator instruction

Hi, If I define a intrinsic function with pointer-typed parameter, for example, def llvm_foo_ptr_ty : LLVMPointerType<llvm_i16_ty>; def int_foo_get : Intrinsic<[llvm_foo_ptr_ty], [llvm_foo_ptr_ty, llvm_i32_ty], [IntrReadArgMem]>; How to lower it for the backend? I'm not sure what kind of register (i16 or i32 or i32) is needed in this case? If the parameter is

Thanks for your reply, Philip. You are right, when I use LLVM-3.8, the 'argmemonly' shows up. Previously, I use LLVM-3.7. I think idempotent is what I want. Can you tell me how to add idempotent attribute to the function? Thanks. Regards, Xiangyang 2016-03-24 14:30 GMT-07:00 Philip Reames <listmail at philipreames.com>: > > > On 03/24/2016 12:45 PM, Xiangyang Guo via

Hi, When I define an intrinsic function with memory write permission, my assumption is that we can either attach [IntrReadWriteArgMem] or [] to the intrinsic function. Based on the comment of the source code , "IntrReadWriteArgMem - This intrinsic reads and writes only from memory that one of its arguments points to, but may access an unspecified amount." "If no property is set,

On 03/24/2016 12:45 PM, Xiangyang Guo via llvm-dev wrote: > Hi, > > When I define an intrinsic function with memory write permission, my > assumption is that we can either attach [IntrReadWriteArgMem] or [] to > the intrinsic function. Based on the comment of the source code , > "IntrReadWriteArgMem - This intrinsic reads and writes only from > memory that one of its

> On Mar 24, 2016, at 12:45 PM, Xiangyang Guo via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi, > > When I define an intrinsic function with memory write permission, my assumption is that we can either attach [IntrReadWriteArgMem] or [] to the intrinsic function. Based on the comment of the source code , "IntrReadWriteArgMem - This intrinsic reads and writes

Thanks for your reply, escha, Yes, -loop-rorate makes it work. Regards, Xiangyang 2015-12-01 12:48 GMT-05:00 <escha at apple.com>: > > > On Dec 1, 2015, at 9:30 AM, Xiangyang Guo via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > > > Hi, All, > > > > Suppose I define one memory read only intrinsic function "foo" in >

Hi, Assume I define registers R0...R15 and two register classes RegA and RegB. RegA contains R0 to R7 while RegB contains R0 to R15. Then I check the machine instruction, it seems that in some cases, the %vreg0 belongs to RegB; in other cases %vreg1 belongs to RegA_RegB. Can you tell me how TableGen decides which is which? At first, I guess &verg0 will be assigned by R8 to R15 only so that

On 1 December 2015 at 12:33, Xiangyang Guo via llvm-dev <llvm-dev at lists.llvm.org> wrote: > if I have the following IR, LICM doesn't work again, even if I use > '-loop-rotate' firstly. In this IR, the return value of intrinsic function > "foo" is used by another function "func2" as parameter. However, for the > intrinsic function

Hi, Assume I have the following code. The first four instructions in each BB does the same thing. So I think GVN() can remove the redundant code. However, after I apply GVN to my module by "Passes.add(createGVNPass())" and "Passes.run(*myModule)". It seems GVN does not remove the redundant instructions. Can anyone give me a hint what's going on here? Any hint is

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Hi, All, Suppose I define one memory read only intrinsic function "foo" in Intrinsics.td like this def int_foo : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrReadMem]>; Suppose I have the following IR, which means the intrinsic function "foo" is called 10 times in a loop. Since the parameters of function "foo" are invariant and the function

Hi, I'm using LLVM-3.8 (current SVN version) to optimize my code. After loop unrolling, I find there is 'undef' in the IR. For example, "*%.lcssa21.unr = phi double [ undef, %.lr.ph9 ], [ %13, %7 ]*". I have two questions: (1) Why this 'undef' is generated? Because before 'loop unrolling', there is no such 'undef'. (2) How LLVM backend deals with

Hi, Gaël, Thanks for your detailed reply. I tried the pattern matching first, however, the intrinsic function is matching with a normal function call. For example, I have the following IR, which contains intrinsic function "foo": ***************************************************************************************** *define i32 @test_func() {* *EntryBlock:* * %0 = call i32

Hi, Diego, Thanks for your quick reply. Inserting a copy instruction may not work here because I have a limitation of virtual register number. I need to assign registers with ssa form to registers without ssa form. I will look the source code you point out. Thanks Xiangyang On Fri, Apr 24, 2015 at 4:19 PM, Diego Novillo <dnovillo at google.com> wrote: > > > On Fri, Apr 24, 2015

Hi, All, I want to lower 64 Bits constant such as 'long' and 'double'. So I define them like this: def CONSTI64 : InstFOO<(outs GRWideRegs:$dst), (ins i64imm:$src), "const-long $dst, $src", [(set (i64 GRWideRegs:$dst), imm:$src)]>{ let isMoveImm = 1; } def CONSTF64 : InstFOO<(outs

Hi, I define a customized node with customized type. The job of this customized node is to move a value from one register class to another class. I find that if there is no use of the destination register, this node will be deleted from SDAG. For some reasons, I want to keep this node. So I attach mayStore attribute to this node and I hope it will not be deleted. However, it does not work like I

There's been some recent noise on the mailing list about requiring -fno-rtti; http://lists.llvm.org/pipermail/llvm-dev/2015-August/089010.html Could that be it? On Sat, Aug 22, 2015 at 12:21 AM, Xiangyang Guo via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi, James and Philip, Thanks for your help. > > Based on your advice, I downloaded llvm-3.7. However, with this new

Hi, I just tried llvm-3.8 (LLVM SVN Repository). With this version, -fno-rtti can help me to compile my code and -irce can help me to do a better job for loop unrolling. However, I still have one question. If I use Clang to compile a piece of c++ code to .bc and then use 'opt -loop-rotate -loop-unroll -irce', I can get what I want. I mean, there is no conditional branch at the end of each

Hi Xiangyang, The algorithm for loop unrolling was changed post-3.5 to do more what you'd expect. If you use 3.6 or 3.7 you'll likely get better results. Cheers, James On Thu, 20 Aug 2015 at 18:09 Philip Reames via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 08/20/2015 07:38 AM, Xiangyang Guo via llvm-dev wrote: > > Hi, > > I want to use loop unrolling

Hi, I want to convert LLVM IR to another type of IR, which has no SSA form. So the most important thing I need to handle is Phi node and register allocation because another type of IR has a limitation of virtual register number. The first thing I can think about is to learn how LLVM Backend works because LLVM Backend handles these things. But I'm not familiar with Backend. After reading some