similar to: [LLVMdev] morestack for ARM

Displaying 20 results from an estimated 20000 matches similar to: "[LLVMdev] morestack for ARM"

2012 Dec 07
0
[LLVMdev] Increase the number of registers in ARM
> I almost change all the instruction formats. It was a huge work. I am going > to compile and run it now. We have done the similar work[1] on this topic by gcc and we have start migrate our platform to LLVM. In my experience, you need to take care the follow part: * ARMBaseRegisterInfo::getRegPressureLimit * ARMBaseRegisterInfo::getRawAllocationOrder * CalleeSavedRegs *
2011 Aug 24
1
[LLVMdev] Segmented Stacks (re-roll)
Hi! > According to the patch you send, the pass is not doing anything: > > +bool StackSegmenter::runOnMachineFunction(MachineFunction &MF) { > + return false; > +} > + It is, in the next patch. diff --git a/lib/CodeGen/StackSegmenter.cpp b/lib/CodeGen/StackSegmenter.cpp index 5ffb8f2..cc2ca87 100644 --- a/lib/CodeGen/StackSegmenter.cpp +++ b/lib/CodeGen/StackSegmenter.cpp
2011 Dec 05
2
[LLVMdev] bug in ARMFrameLowering.cpp:processFunctionBeforeCalleeSavedScan
Hello LLVMDev, I've encountered what looks like a bug in LLVM 2.9, it doesn't appear to be fixed in 3.0 either. The problem occurs in function ARMFrameLowering.cpp:processFunctionBeforeCalleeSavedScan. There's a circular dependency in setting the variable BigStack and AFI->setHashStackFrame(true). The expression which initializes BigStack calls estimateRSSStackSizeLimit which in
2013 Oct 21
1
[LLVMdev] [PATCH] Unwanted r11 in push/pop on Cortex-M.
To recap, this is what I was trying to solve: This C code: int bar(int a, int b, int c, int d, int e, int f); int foo(int a, int b, int c, int d, int e ) { int x = 3*a; return bar3(a,b,c,d,e,x); } Produced the following assembly output: foo: push {r11, lr} sub sp, #8 bl bar add sp, #8 pop {r11, pc} The part I didn't like is that push/pop become
2011 Dec 05
1
[LLVMdev] bug in ARMFrameLowering.cpp:processFunctionBeforeCalleeSavedScan
Hi Alok, Echoing Anton's statements, please provide a testcase! :) Apart from that, looking at your patch and description I actually think that it is estimateRSStackSizeLimit that is wrong. It is performing a check for a Thumb2 addressing mode whether the target has a FP register. That's the main check - for some reason it is appending another check AFI->hasStackFrame() which seems
2016 Oct 03
2
(Thin)LTO llvm build
On Mon, Oct 3, 2016 at 3:53 PM, Xinliang David Li <xinliangli at gmail.com> wrote: > What is the linker command line buidling liblldb.so? is libgcc.a passed in? > There is no difference in the linker command for liblldb.so or bin/lldb between the ld.bfd and ld.gold cases, and neither links libgcc.a that I can see. The difference appears to be that the __morestack symbol is weak in
2016 Oct 04
2
(Thin)LTO llvm build
On Mon, Oct 3, 2016 at 5:24 PM, Xinliang David Li <xinliangli at gmail.com> wrote: > Small repro: > > __attribute__((weak)) int hello_world(); > > int test() { > if (hello_world) > return hello_world(); > return 0; > } > > $ clang -fuse-ld=gold -flto=thin -O2 -shared -fPIC -o libmore.so more.c > $ objdump -t libmore.so |grep hello >
2016 Oct 04
2
(Thin)LTO llvm build
GCC LTO works ok for the test case with both bfd and gold linker. David On Tue, Oct 4, 2016 at 6:58 AM, Teresa Johnson <tejohnson at google.com> wrote: > > > On Mon, Oct 3, 2016 at 6:15 PM, Teresa Johnson <tejohnson at google.com> > wrote: > >> >> >> On Mon, Oct 3, 2016 at 5:24 PM, Xinliang David Li <xinliangli at gmail.com> >> wrote:
2016 Oct 03
3
(Thin)LTO llvm build
In uint64_t RTDyldMemoryManager::getSymbolAddressInProcess(const std::string &Name) { there is reference to morestack: #if defined(__i386__) || defined(__x86_64__) // __morestack lives in libgcc, a static library. if (&__morestack && Name == "__morestack") return (uint64_t)&__morestack; #endif #endif // __linux__ && __GLIBC__ On Mon, Oct 3,
2010 Jul 30
0
`load_missing_constant': uninitialized constant Rails::Railt
Hi All, I run rake gems:install rake gems:unpack If i add configure the rspec-rails gem in config/environment.rb: config.gem "rspec-rails", :version => ">= 1.3.2" and then run server. I am getting this error: /home/Amit/Myworkspace/MyApplication/config/../vendor/rails/railties/lib/rails/gem_dependency.rb:119:Warning:
2016 May 09
0
Ogg Format
Hello Tim, Jean-Marc Thanks for the inputs and the corrections. I think I understand the Ogg Opus better now and it all makes sense. There are two questions that I am left to ask. 1. Since the stream I am working with is a mono channel, what should be the advised page_segments to use. I am using an embedded system so keeping the flash and SRAM usage are vital for the development. 2. In the
2016 Oct 03
2
(Thin)LTO llvm build
Is -fsplit-stack option used anywhere? My wild guess is that with ld.bfd, the thinLTO link for the DSO does not bring in morestack.o from libgcc.a, but the hidden symbol is defined in lldb binary. David On Mon, Oct 3, 2016 at 1:54 PM, Teresa Johnson via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Aha - finally reproduced! The difference is using ld.bfd not ld.gold. With > that I
2017 Jun 02
2
Question regarding to learn LLVM
Hi, I have basic knowledge about LLVM. I want to make expertise in it and also start contributing. So, How do I start? Where do I start? What basic fundamental knowledge is required? Any study material(books, link). Thanks, Amit G
2016 May 09
2
Ogg Format
Hello Tim, Jean-Marc Thanks for the clarification. Let me study the sample OPUS file and see if my understanding is now clarified. Regards Amit On Mon, May 9, 2016 at 2:02 PM, Timothy B. Terriberry <tterribe at xiph.org> wrote: > Amit Ashara wrote: > >> I am referring to the following file >> >> >>
2007 Sep 21
1
[LLVMdev] llvm for ARM
Hi, I have downloaded llvm-2.0 source from llvm.org. My machine specs are: OS : Linux(Debian-Ubuntu) Tool Chain: gcc 3.x and gcc 4.x CPU: X86 I have been able to build llvm. I could not find anywhere in the build or documentation that my build of llvm can produce an ARM binary.In the config.log I could see it detected an X86 CPU which is correct since I am using in fact an X86 host CPU. I
2008 Mar 23
4
GSOC -2008 - Few Questions
Hello All, I am participating in the Google Summer of Code 2008. I am a student from India. I am interested in rewriting Gfxboot as a COM32 module.I am interested in syslinux because I used the ppmtolss16 perl script present in syslinux to create my own splash screen for a kiosk system which was built on Myslax(and isolinux was present too!!!). I am a newbie and have some basic knowledge of C. I
2007 Oct 26
0
[LLVMdev] llvm-build for ARM
On Oct 26, 2007, at 1:04 AM, Amit Singh wrote: > Hi, > > I am trying to build llvm-2.1 and llvm-gcc4 but running into build > errors and not getting the code base compiled successfully since > quite a few time. > > My host OS: Linux(Debian-Ubuntu) > My Host processor: i686 > My target processor: Arm11/Arm9 > Languages support needed: c, c++ > host compiler
2012 Dec 07
2
[LLVMdev] Increase the number of registers in ARM
I almost change all the instruction formats. It was a huge work. I am going to compile and run it now. Best Regards, A. Yazdanbakhsh >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> PhD. Student School of Electrical and Computer Engineering University of Wisconsin-Madison E-mail: yazdanbakhsh
2007 Sep 24
0
[LLVMdev] ARM-BUILD
Hi, I have downloaded llvm-2.0 source from llvm.org. My machine specs are: OS : Linux(Debian-Ubuntu) Tool Chain: gcc 3.x and gcc 4.x CPU: X86 I have been able to build llvm. I could not find anywhere in the build or documentation that my build of llvm can produce an ARM binary.In the config.log I could see it detected an X86 CPU which is correct since I am using in fact an X86 host CPU. I
2007 Oct 26
0
[LLVMdev] build script For ARM
Hi, Further to my problem of building llvm and llvm-gcc for an arm target , it would also be great if I can get any script which builds my llvm and llvm-gcc both , itself taking care of creating directories and setting paths etc..etc.. Regards, Amit -------------- next part -------------- An HTML attachment was scrubbed... URL: