similar to: [LLVMdev] simple optimization question

Hi Bjorn, > currently the following two lines of code with integer variables get compiled completely differently: > > if (d0<tmp) d0=tmp; there must be something else going on because this void bar(int); void foo(int d0, int tmp) { if (d0 < tmp) d0=tmp; bar(d0); } when compiled like this clang -S -O4 -o - sel.c gives this define void @foo(i32 %d0, i32 %tmp) nounwind

Hola a tod en s, explico lo que estoy intentando hacer... Tengo un listado de url comprimidas de twitter, entre las cuales hay muchas repetidas, por lo que el número de registros llega a más de 15K. Por otro lado tengo otra lista de esas url únicas con su equivalente ya descomprimido llegando a un registro de 900. El problema que tengo es que estoy intentando hacer un loop para hacer la

I'm trying to understand how predicated/masked instructions can be generated in llvm, specifically an instruction where a set bit in the mask will write the new result into the corresponding vector lane in the destination and a clear bit will cause the lane in the destination to remain what it was before the instruction executed. I've seen a few places that suggest 'select' is the

Since there are no constructors for Value, how do you properly insert a new Value? If I create a pointer Value *newValue and then call AA.copyValue(oldValue, newValue), this does not work, since newValue is not allocated. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120203/44086cf5/attachment.html>

On 21 Jan 2013, at 14:39, Justin Holewinski <justin.holewinski at gmail.com> wrote: > Instruction selection happens on a different IR: SelectionDAG. In this IR, there are sign-extending loads that the IR converter will use, and are used for example to load 8/16-bit values into 32-bit registers (with sign or zero extension). Any optimizations performed during codegen will be in this

Jeff Bush <jeffbush001 at gmail.com> writes: > Ah, I think I get it now. This was mentioned earlier in the thread, > but it didn't click at the time. It sounds like I can do instruction > selection with a pattern like (omitting selection of the sources): > > let Constraints = "$dst = $oldvalue" in { > def MASKEDARITH : MyInstruction< >

On Jan 21, 2013, at 6:34 AM, Justin Holewinski <justin.holewinski at gmail.com> wrote: > > On Mon, Jan 21, 2013 at 9:16 AM, Bjorn De Sutter <bjorn.desutter at elis.ugent.be> wrote: > On 21 Jan 2013, at 14:39, Justin Holewinski <justin.holewinski at gmail.com> wrote: > >> Instruction selection happens on a different IR: SelectionDAG. In this IR, there are

Jeff Bush <jeffbush001 at gmail.com> writes: > I'm trying to understand how predicated/masked instructions can be > generated in llvm, specifically an instruction where a set bit in the > mask will write the new result into the corresponding vector lane in > the destination and a clear bit will cause the lane in the destination > to remain what it was before the

Hi all, when compiling code like short ptr * = some_address; int val; val = *ptr; if (val>2047) val = 2047; else if (val<-2048) val = -2048. // other things done that require val to be an int ... The load operation is represented by a load and a sign extension operation in the LLVM IR. On most target architectures, there exist signed halfword load instructions, so the load and

On May 9, 2013, at 3:05 PM, Jeff Bush <jeffbush001 at gmail.com> wrote: > On Thu, May 9, 2013 at 8:10 AM, <dag at cray.com> wrote: >> Jeff Bush <jeffbush001 at gmail.com> writes: >> >>> %tx = select %mask, %x, <0.0, 0.0, 0.0 ...> >>> %ty = select %mask, %y, <0.0, 0.0, 0.0 ...> >>> %sum = fadd %tx, %ty >>> %newvalue

Hi Everybody, I recently did a cross-compiling using clang (built with host=x86, target=arm) with the following command: > clang -march=armv7-a -mfloat-abi=soft -ccc-host-triple arm-none-linux-gnueabi -integrated-as main.c -o main.o -c and get error message: ------------------------------------------------------- main.c:9:9: error: instruction requires: thumb2 "ldrex

On Mon, Jan 21, 2013 at 9:16 AM, Bjorn De Sutter < bjorn.desutter at elis.ugent.be> wrote: > On 21 Jan 2013, at 14:39, Justin Holewinski <justin.holewinski at gmail.com> > wrote: > > Instruction selection happens on a different IR: SelectionDAG. In this > IR, there are sign-extending loads that the IR converter will use, and are > used for example to load 8/16-bit

On May 10, 2013, at 11:53 AM, dag at cray.com wrote: > Jeff Bush <jeffbush001 at gmail.com> writes: > >> Ah, I think I get it now. This was mentioned earlier in the thread, >> but it didn't click at the time. It sounds like I can do instruction >> selection with a pattern like (omitting selection of the sources): >> >> let Constraints = "$dst

Ryan Taylor wrote: > Since there are no constructors for Value, how do you properly insert a > new Value? Value is a pure base. If you want to construct a new Value, then you want to construct a global variable or instruction or argument or something in particular. > If I create a pointer Value *newValue and then call > AA.copyValue(oldValue, newValue), this does not work, since

On Thu, May 9, 2013 at 8:10 AM, <dag at cray.com> wrote: > Jeff Bush <jeffbush001 at gmail.com> writes: > >> %tx = select %mask, %x, <0.0, 0.0, 0.0 ...> >> %ty = select %mask, %y, <0.0, 0.0, 0.0 ...> >> %sum = fadd %tx, %ty >> %newvalue = select %mask, %sum, %oldvalue >> >> I believe the generated instructions depend on whether

Nick, First, thanks for responding. Secondly, I just want to create an exact copy of an already exisitng Value, this should be pretty simple to do but I'm unclear on how to do this? For example, PHINode::getIncomingValue (unsigned) returns a "Value" and I want to make a copy of that Value. Is there some other way to do this other than copyValue() that I'm missing? On Sat,

On Thu, Aug 16, 2012 at 12:55 PM, Lei Zhao <leizhao833 at gmail.com> wrote: > Hi Everybody, > > I recently did a cross-compiling using clang (built with host=x86, target=arm) with the following command: > > > clang -march=armv7-a -mfloat-abi=soft -ccc-host-triple arm-none-linux-gnueabi -integrated-as main.c -o main.o -c > > and get error message: > >

Instruction selection happens on a different IR: SelectionDAG. In this IR, there are sign-extending loads that the IR converter will use, and are used for example to load 8/16-bit values into 32-bit registers (with sign or zero extension). Any optimizations performed during codegen will be in this representation, or even MachineInstr form, which is post-isel and any sign-extension information

It works. But a follow-up question: why do I have to compile it to thumb mode in order to pass the compilation? Is there a way to make it compile to regular arm mode? Thanks. - Lei On Aug 16, 2012, at 4:00 PM, Eli Friedman wrote: > On Thu, Aug 16, 2012 at 12:55 PM, Lei Zhao <leizhao833 at gmail.com> wrote: >> Hi Everybody, >> >> I recently did a cross-compiling

Hi, Has anyone successfully implemented the :onsubmit option for form_remote_tag. It doesn''t seem to work for me. Is there any specific version of rails which is required for the same. Here''s my piece of code. <script> function set_tojid(){ alert(''onsubmit''); } </script> <%= form_remote_tag :update => '''', :url => {