similar to: TableGen processing of target-specific intrinsics

Hi, I followed the build instructions at http://www.aarongray.org/LLVM/BuildingLLVMonCygwin.html to build LLVM and LLVM GCC. Everything went fine except for the 'make install' step of llvm. At this step, I am getting a big list of files which are under /cygdrive/c/llvm-2.8/include/llvm and /cygdrive/c/llvm-2.8/include/llvm-c. The error I am getting is: /usr/bin/install:

Hi! I'm trying to figure out how to access the workgroup id from within the LLVM IR language when lowering with the AMDGPU backend. Looking at the 'llvm/include/llvm/IR/IntrinsicsAMDGPU.td' file there are intrinsics defined to access the workitem index (thread index), but this file lives in 'llvm/include':

I am maintaining proprietary extensions to the RISCV backend for our custom application. I have defined intrinsics for many of the custom instructions. Against LLVM 7 this was working well. When I try to merge my changes into LLVM 10, I get: /home/dej/work/llvm_git/llvm-project/llvm/build/lib/Target/RISCV/RISCVGenGlobalISel.inc:11582:60: error: ‘idaho_mt_begin’ is not a member of

No, I don't. Cheers, Gary Dale Johannesen wrote: > This looks OK to check in, do you have write access? > > On Aug 21, 2008, at 6:38 AMPDT, Gary Benson wrote: > > >Dale Johannesen wrote: > >>On Aug 19, 2008, at 7:18 AMPDT, Gary Benson wrote: > >>>I'm trying to implement llvm.memory.barrier on PowerPC. I've > >>>modelled my patch

Hi all, I'm trying to implement llvm.memory.barrier on PowerPC. I've modelled my patch (attached) on the implementation in X86, but when I try and compile my test file (also attached) with llc I get the error "Cannot yet select: 0x10fa4ad0: ch = MemBarrier 0x10fa4828, 0x10fa4c68, 0x10fa4be0, 0x10fa4be0, 0x10fa4be0, 0x10fa4be0". This presumably means my "membarrier"

Dale Johannesen wrote: > On Aug 19, 2008, at 7:18 AMPDT, Gary Benson wrote: > > I'm trying to implement llvm.memory.barrier on PowerPC. I've > > modelled my patch (attached) on the implementation in X86, but > > when I try and compile my test file (also attached) with llc I > > get the error "Cannot yet select: 0x10fa4ad0: ch = MemBarrier > >

Hi, I have implemented intrinsics which are placeholders for instructions executed elsewhere (e.g. in HW). So i have two types of intrinsics migrate_begin and migrate_end. Now i would like to make these intrinsics known to the PowerPC backend. Since the hardware initialization can not be implemented by one instruction it has to be expanded to a library call or lowered to something the ppc

Hi Akira, > This is the definition of BITCAST in include/llvm/CodeGen/ISDOpcodes.h: > > // BITCAST - This operator converts between integer, vector and FP > // values, as if the value was stored to memory with one type and loaded > // from the same address with the other type (or equivalently for vector > // format conversions, etc). The source and result are required to have

OK, I've checked it in for you, thanks. Please do contact Chris about write access. On Aug 22, 2008, at 12:38 AMPDT, Gary Benson wrote: > No, I don't. > > Cheers, > Gary > > Dale Johannesen wrote: >> This looks OK to check in, do you have write access? >> >> On Aug 21, 2008, at 6:38 AMPDT, Gary Benson wrote: >> >>> Dale Johannesen

On Aug 19, 2008, at 7:18 AMPDT, Gary Benson wrote: > Hi all, > > I'm trying to implement llvm.memory.barrier on PowerPC. I've modelled > my patch (attached) on the implementation in X86, but when I try and > compile my test file (also attached) with llc I get the error "Cannot > yet select: 0x10fa4ad0: ch = MemBarrier 0x10fa4828, 0x10fa4c68, > 0x10fa4be0,

The easiest way is probably to look at the source tree and look at the intrinsicsARM.td in llvm/include/llvm directory. Micah From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Sebastien DELDON-GNB Sent: Wednesday, June 13, 2012 6:16 AM To: LLVMdev at cs.uiuc.edu Subject: [LLVMdev] LLVM target specific built-ins Hi all, Does someone knows if there is an

This is the definition of BITCAST in include/llvm/CodeGen/ISDOpcodes.h: // BITCAST - This operator converts between integer, vector and FP // values, as if the value was stored to memory with one type and loaded // from the same address with the other type (or equivalently for vector // format conversions, etc). The source and result are required to have // the same bit size (e.g. f32 <->

Hi all, Does someone knows if there is an easy way to list LLMV built-ins that are target specific ? For instance I would like to know all LLVM built-ins that are implemented for ARM NEON unit, how can I list them ? get their prototype ? Thanks for your answers Best Regards Seb -------------- next part -------------- An HTML attachment was scrubbed... URL:

This looks OK to check in, do you have write access? On Aug 21, 2008, at 6:38 AMPDT, Gary Benson wrote: > Dale Johannesen wrote: >> On Aug 19, 2008, at 7:18 AMPDT, Gary Benson wrote: >>> I'm trying to implement llvm.memory.barrier on PowerPC. I've >>> modelled my patch (attached) on the implementation in X86, but >>> when I try and compile my test

Type::canLoslesslyBitCastTo(Type *Ty) in lib/VMCore/Type.cpp always returns false when it checks whether an integer can be bitcast to a vector or vice versa. For example, (i32 => v2i16) or (v2i16 => i32) is false. But it seems that it returns true if it is checking conversion between two vector types which have the same size. For example, (v4i8 => v2i16) would return true. What is the

Hi, I'm trying to migrate some VMs from KVM to oVirt using virt-v2v and I cannot get it to work. Where do I have to install virt-v2v on the oVirt management host? I've setup a RHEL 7.1 VM with the libguestfs preview for RHEL 7.2, will this work that way. My VM are located on FC LUNs on the KVM server, I'm able to access libvirt using qemu+ssh but the it returns an error that it

I want to generate Haskell bindings to LLVM intrinsics. In a first attempt I wrote a little parser that reads IntrinsicsX86.td and outputs a Haskell module. E.g. the definition def int_x86_avx_max_ps_256 : GCCBuiltin<"__builtin_ia32_maxps256">, Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_v8f32_ty], [IntrNoMem]>; is turned into

Hi Duncan and llvm developers, The attached patch makes the function return true if the conversion is between a vector and an integer of the same size. Please review when you have time. On Tue, Jul 10, 2012 at 12:21 AM, Duncan Sands <baldrick at free.fr> wrote: > Hi Akira, > > > This is the definition of BITCAST in include/llvm/CodeGen/ISDOpcodes.h: > > > > //

Hello, I’m a newbie here, working on a project to enforce Control Flow Integrity (CFI) on programs compiled with LLVM. We’re using LLVM 3.3 so we can leverage poolalloc's dsa analysis. Ideally this will be as target-independent as possible, but our primary target is ARM. One of our passes requires inserting different i32 IDs at various points into the code we’re compiling. As far as I can

Krzysztof Parzyszek via llvm-dev <llvm-dev at lists.llvm.org> writes: >> -----Original Message----- >> From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of David Greene >> via llvm-dev >> Sent: Thursday, August 29, 2019 10:05 AM >> To: llvm-dev <llvm-dev at lists.llvm.org> >> Subject: [EXT] [llvm-dev] Complex proposal v2 >>