Displaying 20 results from an estimated 3000 matches similar to: "New PM for target-specific pre-isel IR passes"
2020 Sep 17
3
[NPM] Register target specific pass with opt
Hello LLVM community,
I was trying to port a target specific loop transformation pass (HexagonVectorLoopCarriedReusePass) to the New Pass Manager. However, I could not figure out a way to register this pass with opt. I can see that llvm/lib/Passes/PassRegistry.def is the registry for target independent passes. Can anyone point me to an example/API which can help me in registering this pass so
2015 Dec 04
2
link error for analysis pass
Hi Mehdi,
I meant when I build the LLVM and it will give the following errors:
make[2]: Entering directory `/home/alex/new/llvm-obj/tools/llc'
llvm[2]: Linking Debug+Asserts executable llc
/home/alex/new/llvm-obj/Debug+Asserts/lib/libLLVMCodeGen.a(Passes.o): In
function `llvm::TargetPassConfig::addIRPasses()':
/home/alex/new/llvm-3.1.src/lib/CodeGen/Passes.cpp:295: undefined reference
to
2020 May 12
3
Codegen pass configs dependent on function attributes?
I’ve put up a patch here: https://reviews.llvm.org/D79769 <https://reviews.llvm.org/D79769> that adds a unified pipeline that targets can opt-into. It has some similarities with forcing fallbacks, but uses a different mechanism to do so to preserve the abort behavior. It therefore requires that every GISel pass needs to explicitly check whether the GISel selector is being requested rather
2020 Jul 11
2
[RFC] Introducing classes for the codegen driven by new pass manager
(NPM: new pass manager; LPM: legacy pass manager)
Hello, community
While we're still working towards using NPM for optimizer pipeline by default, we still don't have a machine pass interface and the corresponding machine pass manager using NPM. The potential benefits using NPM aside, this inhibits us from making any progress on deprecating LPM for the codegen pipeline which blocks
2013 Aug 09
2
[LLVMdev] Making MipsOptimizeMathLibCalls generic
MipsOptimizeMathLibCalls.cpp converts:
g = sqrt (f);
into:
r1 = sqrt (f) readonly;
if (g is a NaN)
r2 = sqrt (f);
g = phi (r1, r2)
I'd like to do the same on z. Would it be OK to make this pass generic
and do the transformation whenever FSQRT isLegalOrCustom for the type?
If so, should it stay a separate pass, or should I merge it with
something else?
Thanks,
Richard
2013 Aug 16
0
[LLVMdev] Making MipsOptimizeMathLibCalls generic
Ping.
Richard Sandiford <rsandifo at linux.vnet.ibm.com> writes:
> MipsOptimizeMathLibCalls.cpp converts:
>
> g = sqrt (f);
>
> into:
>
> r1 = sqrt (f) readonly;
> if (g is a NaN)
> r2 = sqrt (f);
> g = phi (r1, r2)
>
> I'd like to do the same on z. Would it be OK to make this pass generic
> and do the transformation whenever FSQRT
2012 Feb 13
1
[LLVMdev] Vectorization: Next Steps
On Wed, 2012-02-08 at 17:26 -0800, Chris Lattner wrote:
> On Feb 7, 2012, at 12:10 PM, Hal Finkel wrote:
> >>> 1. "Target Data" for vectorization - I think that in order to improve
> >>> the vectorization quality, the vectorizer will need more information
> >>> about the target. This information could be provided in the form of a
> >>>
2015 Dec 04
2
link error for analysis pass
Hi all,
I create a folder containing my new alias analysis pass in the lib/Analysis
folder of the source tree.
I mimic the way IPA did to create a LLVMipa.a library. That is, I write a
Makefile to create my library
and I change the Makefile correspondingly in the Analysis folder.
However, when I want to use my new alias analysis in the Codegen. The
compiler will complain
"undefined
2007 Jun 01
1
Calling C routine in anther package in C code (R_RegisterCCallable)
Hi,
I want to make use of some C routines from other packages to write extensions
in C.
In "Writing R Extensions", it says there is an experimental interface to
support this in (or from ?) R 2.4.0.
I had a dummy library containing src/dummy.cpp and R/zzz.R:
====== src/dummy.cpp ====
#include <R.h>
#include <Rinternals.h>
#include <R_ext/Rdynload.h>
2020 Nov 18
2
Work on DAG Isel for TableGen and compiler
Given that I'm only somewhat up-to-speed on the DAG ISel scheme and not much at all on the Global ISel scheme, I'm tempted to work on the former and then the latter. So I'll look at the CodeGenDAGPatterns messages first. Then I will take a look at Global ISel.
Matt: Can you suggest one or two things about Global ISel that could use some work? I won't get to it quickly, but it will
2020 Nov 13
4
Musings on the TableGen -emit-dag-isel backend
I wouldn't want to be too hasty about simply removing the relaxation
algorithm. The size and speed of the compiler affects all users, but the
time to compile the compiler "only" affects us compiler developers. And I
speak as a developer who is heavily affected by the time to compile the
AMDGPU backend.
One off-the-cuff idea (I haven't even looked at the code yet): could we
pass
2020 Jul 15
3
[RFC] Introducing classes for the codegen driven by new pass manager
> On Jul 15, 2020, at 12:28, Chen, Yuanfang <Yuanfang.Chen at sony.com> wrote:
>
> In codegen with NPM, I've made all codegen passes (IR or MIR pass) to be only driven by `llc`. Both due to the way NPM registering pass (on-demand&dynamic instead of static initialization in Legacy PM), and reduce the confusion about which tool (`llc` or `opt`) to test codegen IR passes.
>
2020 Jul 16
2
[RFC] Introducing classes for the codegen driven by new pass manager
On Wed, Jul 15, 2020 at 6:39 PM Chen, Yuanfang via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> Indeed, but there is a distinction about their position in the pipeline. We run opt & codegen pipeline separately,
Why, though? Is there a reason why this inherently makes sense, or is
it just a historical accident? At least to me it seems that it would
make more sense to run all passes
2018 Jan 06
2
RFC: [LV] any objections in moving isLegalMasked* check from Legal to CostModel? (Cleaning up LoopVectorizationLegality)
Amara,
>I support this direction
Thanks for the support.
>but are there actually any real world workloads where gather/scatter scalarisation would be worth it, on any micro-architecture? If we don’t have examples and the compile time cost is non-negligible then I think we’d still like to keep the early >bailouts in some form.’
It's not like I have specific application code in
2019 Sep 27
3
Question on target-features
Ugh, that would be a “yes” then…
--
Krzysztof Parzyszek kparzysz at quicinc.com<mailto:kparzysz at quicinc.com> AI tools development
From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of Krzysztof Parzyszek via llvm-dev
Sent: Friday, September 27, 2019 10:05 AM
To: Dangeti Tharun kumar <cs15mtech11002 at iith.ac.in>; llvm-dev at lists.llvm.org
Subject: [EXT] Re:
2020 Jul 21
3
[RFC] Introducing classes for the codegen driven by new pass manager
One thing I want to mention. I believe in the current legacy pass manager
implementation only one MachineFunction ever exists at a time. It is
deleted before the next MachineFunction is created. This is very
important for memory usage. I think the MachineOutliner being in the
pipeline may create an exception to this. I think the initial version of
retpoline used a ModulePass and that had to be
2019 May 30
4
Making loop guards part of canonical loop structure
I don't remember the details of the particular case where we encountered this, but I think the loop started with the condition check and ended with an unconditional branch back to the beginning.
--
Krzysztof Parzyszek kparzysz at quicinc.com LLVM compiler development
-----Original Message-----
From: Philip Reames <listmail at philipreames.com>
Sent: Thursday, May 30, 2019 3:00 PM
2019 Nov 25
2
Tablegen PAT limitation?
You are welcome.
I changed the pattern, the same old error pop up again, crash in the same place.
Type set is empty for each HW mode:
possible type contradiction in the pattern below (use -print-records with llvm-tblgen to see all expanded records).
vtInt: (vt:{ *:[Other] })
UNREACHABLE executed at /home/nancy/work/rpp_clang/llvm/utils/TableGen/CodeGenDAGPatterns.cpp:824!
2020 Jul 22
2
[RFC] Introducing classes for the codegen driven by new pass manager
Hi Matt, which analysis is this?
________________________________________
From: Matt Arsenault <whatmannerofburgeristhis at gmail.com> on behalf of Matt Arsenault <arsenm2 at gmail.com>
Sent: Tuesday, July 21, 2020 12:02 PM
To: Craig Topper
Cc: Chen, Yuanfang; Nicolai Hähnle; llvm-dev at lists.llvm.org
Subject: Re: [llvm-dev] [RFC] Introducing classes for the codegen driven by new pass
2019 Dec 23
2
Register Dataflow Analysis on X86
Hi Scott,
That #1073741833 is a register mask. They are treated as aggregate registers (essentially sets of registers), so if it includes R9D and R11D, it will be treated as being aliased with both.
These separate defs are there because they reach disjoint registers.
--
Krzysztof Parzyszek kparzysz at quicinc.com<mailto:kparzysz at quicinc.com> AI tools development
From: Scott