similar to: Combine TableGen documents?

Thank you for driving this Paul, I agree that it is better to have one doc on TableGen. This has been a point of confusion for me as well - when I land in the wrong one and can’t find what I’m looking for :-). -Chris > On Jul 31, 2020, at 1:49 PM, Paul C. Anagnostopoulos via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Thanks, David. I have started a new document titled

Le mer. 28 nov. 2018 à 11:41, David Greene <dag at cray.com> a écrit : > > Quentin Colombet <quentin.colombet at gmail.com> writes: > > > And are there any realistic alternatives for declarative > > representations combines? > > > > Realistic I would have thought we can use the syntax we already have > > for SDISel. > > In other

I hacked around a bit with the simple case of tracing just classes and defs (no multiclasses or defms). Below you will see my test file and then the output produced. Note that the regular output from the PrintRecords backend follows the trace, so you can see the final classes and records there. Once the trace can be selective, it makes sense to add another option for PrintRecords that restricts

Hello. Are you aware of any document (preferably academic paper) describing TableGen's typing of the following fields used to describe Instruction: pattern, ins and outs. I found a few pages on TableGen, but none of them talking about these fields: http://llvm.org/docs/TableGen/LangRef.html http://llvm.org/docs/TableGen/LangIntro.html

Hello, http://llvm.org/docs/TableGen/LangIntro.html says I can use octal integer value (indicated by a leading 0). In fact the number is converted to decimal. With best regards, Romick.

Hello all, I don't find anything helping me understand the llvm bang operator. In the llvm TableGen language reference, it only says: 'TableGen also has “bang operators” which have a wide variety of meanings: *'* I would be very thankful if someone can explain it to me. e.g. what does "!strconcat" or "!if" mean? Cheers ES -------------- next part --------------

On Thu, Jul 23, 2015 at 9:53 AM, Sky Flyer <skylake007 at googlemail.com> wrote: > Hello all, > > I don't find anything helping me understand the llvm bang operator. In the > llvm TableGen language reference, it only says: > > 'TableGen also has “bang operators” which have a wide variety of meanings:' > > I would be very thankful if someone can explain it

Thanks David! > On Nov 9, 2018, at 08:36, David Greene <dag at cray.com> wrote: > > Daniel Sanders via llvm-dev <llvm-dev at lists.llvm.org> writes: > >> I've been working on the GlobalISel combiner recently and I'd like to >> share the plan for how Combine Rules will be defined in GlobalISel and >> solicit feedback on it. > > This is

Le mer. 28 nov. 2018 à 10:34, Amara Emerson <aemerson at apple.com> a écrit : > > > On Nov 27, 2018, at 5:01 PM, Quentin Colombet via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > Hi Daniel, > > Let me try to clarify my concern. > > Le mar. 27 nov. 2018 à 14:23, Daniel Sanders > <daniel_l_sanders at apple.com> a écrit : > > > >

On Friday 05 June 2009 17:41, Dan Gohman wrote: > How is bc_memopv4i32 defined? The bitconvert in the tablegen > output is marked isInt, which means it's the node that didn't get > inferred. def bc_memopv4i32 : PatFrag<(ops node:$ptr), (bitconvert (memopv4i32 node:$ptr))>; -Dave

On Tuesday 07 April 2009 01:18, someguy wrote: > Can you give an example of where you would use such a feature? > It seems entirely too abstract (at least to me) at the moment. Basically I wanted to pass the various prefix encoding classes (XS, XD, etc.) down into generic SIMD multiclasses so that we could write rr / rm patterns once and reuse them with different prefix encoding base

I've been playing around with some ways to tighted up our AVX specification and have hit upon a nice way to reduce a bunch of code. Unfortunately, right now TableGen can't handle it. Here's a simple example of what I want to do: class Data<string n, int v> { string Name = n; int Value = v; } // Define some objects usable as arguments. def X : Data<"X", 1>;

I wasn't sure how to respond to John Byrd's post, since it wasn't addressed to me. So I've responded to Nicolai's. I'm reasonably far along in the process of writing a new Programmer's Guide for TableGen. I will continue working on it and submit it for review. I expect to do some rewriting as a result. John: Would you like me to respect a copyright on your documents

I've got another idea for a tblgen extension but I don't have a good feel for how feasible it is. Hopefully someone can provide guidance. What I want to do is something like this: class C1<int A, string B> { int foo = A; string bar = B; } class Bb<int A> : C1<A, "foo">; class Cb<int A> : C1<A, "bar">; class C2<C1 Base, int

> On Nov 13, 2018, at 08:01, David Greene <dag at cray.com> wrote: > > Daniel Sanders via llvm-dev <llvm-dev at lists.llvm.org> writes: > >> That's an interesting idea. Certainly tablegenerating InstCombine >> ought to be possible and sharing code sounds like it ought to be >> doable. MIR and IR are pretty similar especially after IRTranslator

Yes, I understand the problem. To be more useful, TableGen would have to carry the traces along with the classes and records and (re)display the values while the substitutions are being made. I'm writing a new Programmer's Guide for TableGen and have been digging into the parse-time versus substitution-time issue. I haven't found a document that makes it clear. Can you give a quick

On Wednesday 02 December 2009 16:51, Eli Friedman wrote: > On Wed, Dec 2, 2009 at 2:44 PM, David Greene <dag at cray.com> wrote: > > I'm working on some of the AVX insert/extract instructions.  They're > > stupid.  They do not operate on ymm registers, meaning we have to > > use VINSERTF128/VEXTRACTF128 and then do the real operation. > > > > Anyway,

Hi Daniel, Disclaimer: Haven't read the proposal yet. > TL;DR: We're planning to define GlobalISel Combine Rules using MIR syntax with a few bits glued on to interface with the algorithm and escape into C++ when we need to. Eventually, ISel rules may follow suit. I would rather avoid adding a dependency on yet another tablegen backend to the project unless we are confident it is

I currently have a child class of a parent one. The parent defines some variable that I need to use in the child class. I am also using gepetto. Gepetto is complaining about the syntax of the child variable. It is saying that "$parentVar" should be "$::parentVar" however, when changing to what Gepetto wants to use this breaks my classes. Does anyone know the proper

Eli Friedman <eli.friedman at gmail.com> writes: > int_x86_avx_vhadd_pd_xmm doesn't exist on trunk. Why does it exist on > your branch if the semantics are exactly equivalent to > int_x86_sse3_hadd_pd? The register allocator can handle converting to > three-address form if the target provides the appropriate hooks. Because in some cases users may want to explicitly use