similar to: LLVM source compilation Error: CommandLine Error: Option 'mc-relax-all' registered more than once!

Thanks for your quick reply. I have also tried disabling build shared libs, specifying via "-DBUILD_SHARED_LIBS=OFF" in my cmake config line However I am getting the same exact error with this flag specified as well. Just an idea, would removing all llvm/clang instances/libs on my machine work? Do you know what the default location is of these shared/static llvm libraries that are

Kai Nacke via llvm-dev <llvm-dev at lists.llvm.org> writes: > Compiling for AArch64: CommandLine Error: Option > 'aarch64-branch-relax' registered more than once! > > Hi all! > > I am trying to run LDC (LLVM-based D compiler) on AArch64. The > compiler contains all IR and target specific passes. You can view it > as combined llc/opt tool. It uses the same

> Tim: does it make sense to just remove this flag? Might well do (and a bunch of the other parametrization flags in there that look like they might even date from when the ISA was up in the air), but I doubt it would fix the issue. aarch64-branch-relax looks very suspiciously like it would be at the beginning of any alphabetical sort of options. I suspect there's some weird DLL name

Compiling for AArch64: CommandLine Error: Option 'aarch64-branch-relax' registered more than once! Hi all! I am trying to run LDC (LLVM-based D compiler) on AArch64. The compiler contains all IR and target specific passes. You can view it as combined llc/opt tool. It uses the same strategy as opt to collect the passes with the NameParser. Like llc, it calls

The size suffix thing is a weird quirk in our assembler I should look into fixing. Instructions in at&t syntax usually have a size suffix that is often optional For example: add %ax, %bx and addw %ax, %bx Are equivalent because the register name indicates the size. but for an instruction like this addw $1, (%ax) There is nothing to infer the size from so an explicit suffix is

More specifically there is no instruction that can add/subtract segment registers. They can only be updated my the mov segment register instructions, opcodes 0x8c and 0x8e in x86 assembly. I suggest you write the text version of the assembly you want to generate and assemble it with llvm-mc. This will tell you if its even valid. After that you can use -show-inst to print the names of the

This shouldn't have parsed. movq (%gs), %r14 That's trying to use%gs as a base register which isn't valid. GNU assembler rejects it. And coincidentally llvm-mc started rejecting it on trunk late last week. That's probably why it printed as %ebp. I don't know if there is an instruction to read the base of %gs directly. Maybe rdgsbase, but that's only available on Ivy

Dear All, Currently I am trying to inject custom x86-64 assembly into a functions entry basic block. More specifically, I am trying to build assembly in a machine function pass from scratch. While the dumped machine function instruction info displays that %gs will be used, when I perform objdump -d on my executable I am see that %gs is replaced by %ebp? Why is this happening? I know it probably

Hi folks! I'm trying to build LLVM with LLVM on Ubuntu using the commands below. Building it with the GNU stuff (cpp, gcc, g++ and binutils packages) works, but after removing it, moving LLVM to /usr/local and symlinking /usr/bin/ld to ld.lld, I'm getting the following: === snip === -- The C compiler identification is Clang 8.0.1 -- The CXX compiler identification is Clang 8.0.1 -- The

Dear Mr. Northover, Thank you for the quick reply. You are correct about the address-mode operands :) . I guess an important detail left out was that the basic block (call it A) that wants to calculate the address of the target stationary trampoline basic block (call it B) will be moved around in memory during run-time. Our earlier solution, before the feature was implemented to move around (A)

Hi Rui, Not sure if you have seen this problem, but I have been running into this problem when I run the lld tests and the failure occurence is once in 5 times. lld: ../tools/lld/lib/Core/Resolver.cpp:402: void lld::Resolver::deadStripOptimize(): Assertion `symAtom' failed. #0 0x4b05ae llvm::sys::PrintStackTrace(_IO_FILE*)

Dear All, I am performing some analysis on a traditional IR Module Pass in LLVM, with that analysis I want to tag the places I will need to extract file offsets from as custom symbols. Ideally I would want to attach some metadata to a IR instruction, and have it be accessible when I perform a backend MF pass. Essentially I want to pass the information I collected and generated in the IR pass,

Dear All, I am working on a x86 backend machineFunction pass, where I am trying to save the hard coded address of an arbitrary machine basic block to memory in ASM. I know the assembly needed for this but am lost at how to construct the BuildMI(). Note that these machine basic blocks are not entry's to a function. but in the middle of the function. so using addGlobalAddress or

Dear Mailing List, This might sound unconventional, but I am trying to access a C++ objects vtable to pass as an argument to a function call for a library function I created. Creating & inserting a function call at the correct location in LLVM is done. I have learned that C++ objects are represented as struct types. But I'm just not quite sure how to get at the vtable pointer within,

Dear llvm-dev-list, I have created my own custom section to be added at the end into a binary upon compilation which contains address of all basic blocks. As the final address of the basic block is not known until link time, I collect the MCSymbol* Symbol Values per BB in a temp array and at the in the custom section and emit it (emitSymbolValue) into my section within EmitEndOfAsmFile() I have

Hi Tom, can you change your release process in concerns of "RC" releases at naming convention? [ Example ] Git Tag: "llvmorg-10.0.1-rc1" llvm-project prerelease tarball: "llvm-project-10.0.1rc1.tar.xz" The release Git tag is called "llvmorg-10.0.1-rc1" (here: "-rc1" with dash) but the provided prerelease tarballs have "10.0.1rc1"

As first discussed in the giant "New LLVM git repository conversion prototype" thread, I've pushed a git tag that allows git-describe to be used for generating human readable commit names on master. The tag is "llvmorg-10-init", to be interpreted as "the initial commit with major version number 10". The idea is to add similar tags along with future version bumps.

Hi Tobias, The work is complete. I did it and my patch was ignored probably due to my use of Macros. I then recently re did the work without using macros and submitted a patch a few days ago. So far this has been ignored as well :( . If you have commit access I'd love for you to review the patches and then commit them so my work will be available in LLVM 3.3 (when it's released) so that

Hello everyone, A little less than a week after rc3, the llvmorg-11.0.0-rc4 tag was just created. Source code and docs are available at https://prereleases.llvm.org/11.0.0/#rc4 and https://github.com/llvm/llvm-project/releases/tag/llvmorg-11.0.0-rc4 Pre-built binaries will be added as they become ready. Please file bug reports for any issues you find as blockers of https://llvm.org/pr46725

These errors seem pretty pervasive for me on a clean build. It appears that it arises because when tablegen'd headers are included in a .h file, every place where that .h file is used needs a dependency on the corresponding IncGen targets. This seems broken in the short term and unmaintainable in the long term. There really needs to be a way of automatically generating the right