Displaying 20 results from an estimated 10000 matches similar to: "How to prevent llvm's default optimization"
2020 Jun 30
2
How to prevent llvm's default optimization
Yes - this has been in InstCombine for a long time:
https://github.com/llvm/llvm-project/blob/master/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp#L268
We could say that the canonicalization should be reversed, but that
probably uncovers more missing optimizations.
The code size concern is legitimate. For example on x86, gcc asm is 2 bytes
smaller on this example:
2020 Jul 01
2
How to prevent llvm's default optimization
Thanks. I have checked the hook DAGCombiner::isMulAddWithConstProfitable
And I think the above condition is too aggressive.
// If the add only has one use, this would be OK to do.
if (AddNode.getNode()->hasOneUse())
return true;
Shall we make it to
if (AddNode.getNode()->hasOneUse() && TargetLowering.isCheaperCommuteAddMul(......))
return true;
The virtual hook
2013 Sep 15
2
[LLVMdev] LLVM disassembler bugs
The attached patch includes no test-case and isn't consistent with the rest
of the file:
- constants should be on the right hand side of comparisons
- the braces around your single line 'if' aren't needed.
On Sun, Sep 15, 2013 at 2:39 PM, James Courtier-Dutton <
james.dutton at gmail.com> wrote:
> I attach a patch that fixes this bug. Applies to llvm 3.4svn
>
>
2013 Sep 15
0
[LLVMdev] LLVM disassembler bugs
Test case attached. It is not a test case that works within the llvm
test-suite yet, but it does demonstrate the problem.
I would like some advice on how to modify this test_case so that it can be
added to the automated llvm test cases.
On 15 September 2013 23:02, David Majnemer <david.majnemer at gmail.com> wrote:
> The attached patch includes no test-case and isn't consistent
2013 Sep 15
0
[LLVMdev] LLVM disassembler bugs
I attach a patch that fixes this bug. Applies to llvm 3.4svn
Please commit it please.
Kind Regards
James
On 13 September 2013 17:46, James Courtier-Dutton <james.dutton at gmail.com>wrote:
> Hi,
>
> I am looking at the "LLVMOpInfoCallback GetOpInfo" callback.
>
> Example 1 GOOD:
> 41 c6 84 24 16 04 00 00 0c : movb $12, 1046(%r12)
>
> Makes
2013 Mar 16
3
[LLVMdev] Simple question
On Mar 15, 2013 10:53 PM, "Óscar Fuentes" <ofv at wanadoo.es> wrote:
>
> James Courtier-Dutton <james.dutton at gmail.com> writes:
>
> > I think this is a very simple question, and it must just be missing
something.
> >
> > I am looking for find out how to assign a constant integer value to
> > the variable in llvm ir.
> >
> > The
2013 Oct 29
2
[LLVMdev] Missed optimization opportunity with piecewise load shift-or'd together?
On Mon, Oct 28, 2013 at 10:09 AM, James Courtier-Dutton
<james.dutton at gmail.com> wrote:
> My guess is that this is a missed optimization, but in real life, all
> projects i have worked fix this in the C or C++ code using macros that
> change what instructions are used based on target platform and its
> endedness.
One reason for writing code like this, i.e. explicitly spelling
2013 Mar 15
0
[LLVMdev] Simple question
On Mar 15, 2013, at 3:08 PM, James Courtier-Dutton <james.dutton at gmail.com> wrote:
> Hi,
>
> I think this is a very simple question, and it must just be missing something.
>
> I am looking for find out how to assign a constant integer value to
> the variable in llvm ir.
>
> The following returns 12, and %var2 = 12.
> ; ModuleID = 't.c'
> target
2013 Mar 15
0
[LLVMdev] Simple question
James Courtier-Dutton <james.dutton at gmail.com> writes:
> I think this is a very simple question, and it must just be missing something.
>
> I am looking for find out how to assign a constant integer value to
> the variable in llvm ir.
>
> The following returns 12, and %var2 = 12.
> ; ModuleID = 't.c'
> target datalayout =
>
2013 Jun 28
0
[LLVMdev] Question regarding the x86 SBB instruction.
Look at the __builtin_addc* builtins in clang. I am currently working on an optimization which transforms said intrinsics into chains of ADCs/SBBs.
Michael
On Jun 28, 2013, at 5:51 AM, James Courtier-Dutton <james.dutton at gmail.com> wrote:
> Hi,
>
> I have the x86 SBB instruction. how should I represent this in LLVM
> IR. (as part of a decompiler from binary to LLVM IR)
2013 Oct 29
0
[LLVMdev] Missed optimization opportunity with piecewise load shift-or'd together?
----- Original Message -----
> On Mon, Oct 28, 2013 at 10:09 AM, James Courtier-Dutton
> <james.dutton at gmail.com> wrote:
> > My guess is that this is a missed optimization, but in real life,
> > all
> > projects i have worked fix this in the C or C++ code using macros
> > that
> > change what instructions are used based on target platform and its
>
2013 Apr 13
2
[LLVMdev] GSoC project questions.
----- Original Message -----
> From: "Anton Korobeynikov" <anton at korobeynikov.info>
> To: "James Courtier-Dutton" <james.dutton at gmail.com>
> Cc: "Hal Finkel" <hfinkel at anl.gov>, "Bill Wendling" <isanbard at gmail.com>, "LLVM Developers Mailing List"
> <llvmdev at cs.uiuc.edu>
> Sent: Saturday,
2017 Apr 16
2
[LLVMdev] Moving towards a singular pointer type
On Sun, Apr 16, 2017 at 2:34 AM James Courtier-Dutton via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Hi,
>
> Did this work ever get done? There was a long thread about it back in 2015.
>
> I wish to use IRBuilder.
> Is there any documentation?
> How do I use the singular pointer type in GEP, LOAD, STORE instructions?
>
Sorry, no, the work is not complete - for
2013 Oct 30
1
[LLVMdev] Missed optimization opportunity with piecewise load shift-or'd together?
I wrote up this optimization as an LLVM IR pass last month, actually:
https://code.google.com/p/foster/source/browse/compiler/llvm/passes/BitcastLoadRecognizer.cpp
It recognizes trees of `or' operations where the leaves are (buf[v+c] << c
* sizeof(buf[0])).
There are a few improvements needed to make it fit for general consumption;
it assumes (without checking) that it's targeting
2012 May 07
0
[LLVMdev] Using LLVM for decompiling.
> -----Original Message-----
> On Behalf Of James Courtier-Dutton
> To: John Criswell
>
> On 7 May 2012 16:31, John Criswell <criswell at illinois.edu> wrote:
> > On 5/7/12 5:47 AM, James Courtier-Dutton wrote:
> >>
> >> Hi,
> >>
> >> I am writing a decompiler. I was wondering if some of LLVM could be
> >> used for a
2013 Mar 12
0
[LLVMdev] help decompiling x86 ASM to LLVM IR
James Courtier-Dutton <james.dutton at gmail.com> writes:
> I am looking to decompile x86 ASM to LLVM IR.
> The original C is this:
> int test61 ( unsigned value ) {
> int ret;
> if (value < 1)
> ret = 0x40;
> else
> ret = 0x61;
> return ret;
> }
>
> It compiles with GCC -O2 to (rather
2019 May 06
3
RFC: On removing magic numbers assuming 8-bit bytes
On Mon, 6 May 2019 at 10:13, James Courtier-Dutton via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> Although the above is mentioning bytes, looking at the "/ 8" and "& 0x7" makes it look like the author meant octets and not bytes.
> Bytes can be any size of bits.
I don't think you'll have much luck trying to make that stick for a
general audience,
2013 Apr 13
0
[LLVMdev] GSoC project questions.
Thanks for your replies.
Working on the lfort compiler would certainly be an interesting project for
me for this GSoC. I have studied lfort repository and commits, and I see
that it has a lot of stuff for C/C++, am I correct that this is a fork of
Clang? If this is correct, I wonder why this approach was chosen instead of
starting out from scratch - is it because Clang already has a lot of code
2012 May 07
6
[LLVMdev] Using LLVM for decompiling.
On 7 May 2012 16:31, John Criswell <criswell at illinois.edu> wrote:
> On 5/7/12 5:47 AM, James Courtier-Dutton wrote:
>>
>> Hi,
>>
>> I am writing a decompiler. I was wondering if some of LLVM could be
>> used for a decompiler.
>> There are several stages in the decompiler process.
>> 1) Take binary and create a higher level representation of it.
2018 May 08
0
I am leaving llvm
On 8 May 2018 at 16:34, James Courtier-Dutton via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> Has something changed?
> So, it seams that LLVM do not participate in Outreachy.
Last email from Tanya was looking for folks to participate, there was
no update that it wouldn't happen. Maybe this is a new development?
Anyway, I think if the foundation considers this again, there