similar to: RISC-V LLVM sync-up call 19 Mar 2020

If I’m following correctly, there are two size-limited areas. One area, limited to 2GB, is the “text” area. This contains all the code. Then there’s a “global” area, limited to 4GB, which is pointed to by the global pointer. This contains the GOT, plus a flexible area that the object file can stick small bits of data into. And then outside of both of those, additional data is unlimited. It

Hi, Sam. I think that it's a fair comparison. Keep in mind that the GP is only used to reach global variables of local scope and the GOT, where the address of global variables of global scope reside. This model assumes that the distance between the GP and the global data area, GOT and local scope variables is defined at link time. __ Evandro Menezes ◊ SiFive ◊ Austin, TX > On Mar

Oh, I wasn’t really thinking about devices without an MMU where the addresses are physically separated. Makes sense. This reminds me of rwpi on ARM; it has a sort of similar scheme of referring to data indirectly through a pointer, but it also changes the ABI to keep the pointer in a reserved register. -Eli From: Evandro Menezes <evandro.menezes at sifive.com> Sent: Friday, March 20, 2020

For background on these calls, see <http://lists.llvm.org/pipermail/llvm-dev/2019-September/135087.html>. Reminder: the purpose is to co-ordinate between active contributors. If you have support questions etc then it's best to post to llvm-dev. We have a call every alternate Thursday at 4pm BST, via <https://meet.google.com/ske-zcog-spp>. We have created a shared calendar which

For background on these calls, see <http://lists.llvm.org/pipermail/llvm-dev/2019-September/135087.html>. Reminder: the purpose is to co-ordinate between active contributors. If you have support questions etc then it's best to post to llvm-dev. We have a call every alternate Thursday at 4pm GMT, via <https://meet.google.com/ske-zcog-spp>. We have a shared calendar which may help

# Overview and background RISC-V is a free and open instruction set architecture. It is a modular specification, with a range of standard extensions (e.g. floating point, atomics, etc). New standard extensions are developed through RISC-V Foundation working groups. The specifications for such extensions (e.g. vector and bit manipulation) are publicly available, but are still in flux and won't

Hello, I'm running mixed models in GAMM4 with 2 (non-nested) random intercepts and I want to include a spline term for one of my exposure variables. However, when I include a spline term, I always get reported degrees of freedom of less than 1, even when I know that my spline is using more than 1 degree of freedom. For example, here is the code for my model: >

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Folks, I'm at a loss trying to add Compiler-RT to an LLVM build, even after checking out the instructions at http://compiler-rt.llvm.org, so I'd appreciate your help. I've tried adding the CMake options LLVM_ENABLE_PROJECTS, LLVM_BUILD_EXTERNAL_COMPILER_RT, LLVM_EXTERNAL_COMPILER_RT_SOURCE_DIR, CLANG_DEFAULT_RTLIB. All to no avail. FWIW, I'm building for the targets

I'd appreciate some help in figuring out how to determine which InstrItinClass an instruction belongs to. For example, an InstrItinClass is defined in Schedule.td as: def FOO : InstrItinClass; Which is then used to build an InstrItinData in ProcessorItineraries and to specify the class of a particular instruction. I'd like to find out from a given instruction which class it belongs

> On Jul 22, 2020, at 18:09, Jonathan Roelofs <jonathan_roelofs at apple.com> wrote: > > > >> On Jul 22, 2020, at 4:31 PM, Evandro Menezes <evandro.menezes at sifive.com <mailto:evandro.menezes at sifive.com>> wrote: >>> Sure, let’s talk about what that end goal should be! Can you give some other examples of where these inconsistencies could be

> On Jul 21, 2020, at 14:30, Chris Lattner via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > >> On Jul 21, 2020, at 11:50 AM, Jonathan Roelofs via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: >> >> A question of preference came up in https://reviews.llvm.org/D83588 <https://reviews.llvm.org/D83588>

Hi, Jonathan. > On Jul 21, 2020, at 17:15, Jonathan Roelofs <jonathan_roelofs at apple.com> wrote: > > > >> On Jul 21, 2020, at 1:46 PM, Evandro Menezes <evandro.menezes at sifive.com <mailto:evandro.menezes at sifive.com>> wrote: >> >> >> >>> On Jul 21, 2020, at 14:30, Chris Lattner via llvm-dev <llvm-dev at lists.llvm.org

On 03/20/2017 03:33 PM, Jonathan Roelofs wrote: > On 3/20/17 1:47 PM, Evandro Menezes via llvm-dev wrote: >> Folks, >> >> I'm at a loss trying to add Compiler-RT to an LLVM build, even after >> checking out the instructions at http://compiler-rt.llvm.org, so I'd >> appreciate your help. >> >> I've tried adding the CMake options

Hello, I believe MCInstrDesc::getSchedClass() is what you're looking for. -Jim On Nov 28, 2011, at 5:03 PM, Evandro Menezes wrote: > I'd appreciate some help in figuring out how to determine which > InstrItinClass an instruction belongs to. > > For example, an InstrItinClass is defined in Schedule.td as: > > def FOO : InstrItinClass; > > Which is then used

Hi Everyone, I am wondering how to use RISC-V V (Vector) extension instructions in LLVM IR. In 2019 Kruppe and Espasa gave a talk [1] overviewing the Vector extension and on slide 16 [2] they show LLVM IR samples which use the vector instructions through intrinsic functions, such as: %vl = call i32 @llvm.riscv.vsetvl(i32 %n) At the time of the talk (April 2019) LLVM support for the V

On 08/21/12 16:49, Jim Grosbach wrote: > > I like that. Possibly with the addition that we can filter by a specific property. -Winfer=neverHasSideEffects, e.g., would only show when that specific property is inferred. > > Beyond that, I don't see an alternative to an audit of the instructions that get flagged by such a warning. :( This proposal would certainly make my life easier

On Fri, Mar 2, 2012 at 11:32 AM, Evandro Menezes <emenezes at codeaurora.org> wrote: ... > Figure 3.3 on page 16 of www.x86-64.org/documentation/abi.pdf is not > normative. See foot note 7 in the same page. Figure 3.4 on page 21 > confirms that the use of a frame-pointer is optional. > > So, if one doesn't use ENTER in the prologue and uses RSP to access local >

Hi, I'm not a programmer, so I have a question about R functions, I run the Random Forest regression models, but I would like to run the random forest model 1000 times with different random sample set. to check the uncertainty of the regression model estimates. exemple of data: ################################# table= all Y: all$AGB X variables: Variables=as.matrix(all[, c( "min",

Sebastian, If not a test, how about a patch in the documentation for TableGen about this new feature that you're making available? -- Evandro Menezes Austin, TX emenezes at codeaurora.org Qualcomm Innovation Center, Inc is a member of the Code Aurora Forum On 06/20/12 16:02, Sebastian Pop wrote: > On Wed, Jun 20, 2012 at 3:40 PM, Villmow, Micah<Micah.Villmow at