similar to: Why MachineBasicBlcok doesn't have transferPredecessors() ?

for example I want to insert a new machine bb “before” a specific machine bb. or split a mbb and keep the later one as the original one. (to keep the label/Blackadder's correct t) (or keep other property of mbb) so I need to transfer the original mbb's predecessor to the new mbb. Nicolai Hähnle <nhaehnle at gmail.com> 於 2020年3月13日 週五 23:57 寫道： > On Fri, Mar 13, 2020 at

Hi I am developing some machine function pass. I want to split MachineBasicBlcok when I find some specific machine instruction. But I don't insert or delete any machine instruction. I just "simply" , "purely" split the MachineBasicBlcok. (So, I stole the idea from ARM64BranchRelaxation::splitBlockBeforeInstr.) This is my code : // I would pass call instruction to

Cool, that worked. New patch attached... Cheers, Gary Evan Cheng wrote: > Just cast both values to const TargetRegisterClass*. > > Evan > > On Jul 10, 2008, at 7:36 AM, Gary Benson wrote: > > Evan Cheng wrote: > > > How about? > > > > > > const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : > > > &PPC:G8RCRegClass; >

So if I want to know whether a CallInst is a C++ virtual call or not. I have to get the information at frontend/Clang. and then pass the information to middle-end/LLVM IR by myself. Is it right? Thank you David Blaikie <dblaikie at gmail.com> 於 2020年6月19日 週五 上午1:26寫道： > On Thu, Jun 18, 2020 at 9:53 AM PenYiWang via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > >

Hi I want to replace all the return instructions in the program with pop <reg>; jmp <reg>. Should I use IRBuilder in LLVM IR level? I found that there is a IRBuilder::CreateIndirectBr Or Should I modify the code in lib/Target/X86/X86ISelLowering.cpp in backend ? I found that there is a X86TargetLowering::LowerCall Which is better? Thanks -------------- next part --------------

Hi We knew that "clang -mllvm -debug-pass=Structure ..." can print all pass' name. But, when we use LTO , -flto flag and gold plugin. I found that the option " -debug-pass=Structure" would not pass to ld. so it would not print all the LTO pass's name. -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hi I know that a virtual call looks like this : %4 = load %class.base*, %class.base** %1, align 8 %5 = bitcast %class.base* %4 to void (%class.base*)*** %6 = load void (%class.base*)**, void (%class.base*)*** %5, align 8 %7 = getelementptr inbounds void (%class.base*)*, void (%class.base*)** %6, i64 0 %8 = load void (%class.base*)*, void (%class.base*)** %7, align 8 call void

Hi I am modifying X86RetpolineThunks.cpp. X86RetpolineThunks.cpp 's location is llvm-src/lib/Target/X86. Which target should I use , next time use clang test.c , I can see the difference . I found that "make llc" doesn't work. And either "make LLVMX86CodeGen" doen't work. "make clang" waste a lot of time, even -j64. Every time modifying the file

Hi I want to write a FunctionPass to insert some code before return. Funcion: .. .. .. mov eax,[esp] cmp eax,0x12345678 je 0x12345678 ret (maybe stack will not balance) I wonder that can I get the return address at llvm ir level? I use IRBuilder to CreateICmpEQ and CreateCondBr. but I don't how to get the value of return addrss. I have found there is a Intrinsic::returnaddress. Is

Hi Evan, Evan Cheng wrote: > This does not patch cleanly for me (PPCISelLowering.cpp). Can you > prepare a updated patch? This should work, though I won't have access to my test box now until next Thursday so no guarantees :) Cheers, Gary -- http://gbenson.net/ -------------- next part -------------- Index: lib/Target/PowerPC/PPCISelLowering.h

Ah, didn't see that, that's what comes of trying to do something at 5pm :) I attached an updated patch which creates a virtual register instead of using R0. How does this look? Cheers, Gary Dan Gohman wrote: > PPCTargetLowering::EmitInstrWithCustomInserter has a reference > to the current MachineFunction for other purposes. Can you use > MachineFunction::getRegInfo instead?

PPCTargetLowering::EmitInstrWithCustomInserter has a reference to the current MachineFunction for other purposes. Can you use MachineFunction::getRegInfo instead? Dan On Jul 8, 2008, at 1:56 PM, Gary Benson wrote: > Would it be acceptable to change MachineInstr::getRegInfo from private > to public so I can use it from > PPCTargetLowering::EmitInstrWithCustomInserter? > >

Hi Gary, This does not patch cleanly for me (PPCISelLowering.cpp). Can you prepare a updated patch? Thanks, Evan On Jul 10, 2008, at 11:45 AM, Gary Benson wrote: > Cool, that worked. New patch attached... > > Cheers, > Gary > > Evan Cheng wrote: >> Just cast both values to const TargetRegisterClass*. >> >> Evan >> >> On Jul 10, 2008, at 7:36

Evan Cheng wrote: > You need to insert new basic blocks and update CFG to accomplish this. > There is a hackish way to do this right now. Add a pseudo instruction > to represent this operation and mark it usesCustomDAGSchedInserter. > This means the intrinsic is mapped to a single (pseudo) node. But it > is then expanded into instructions that can span multiple basic >

Just cast both values to const TargetRegisterClass*. Evan On Jul 10, 2008, at 7:36 AM, Gary Benson wrote: > Evan Cheng wrote: >> How about? >> >> const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : >> &PPC:G8RCRegClass; >> unsigned TmpReg = RegInfo.createVirtualRegister(RC); > > I tried something like that yesterday: > > const

Evan Cheng wrote: > How about? > > const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : > &PPC:G8RCRegClass; > unsigned TmpReg = RegInfo.createVirtualRegister(RC); I tried something like that yesterday: const TargetRegisterClass *RC = is64bit ? &PPC::GPRCRegClass : &PPC::G8RCRegClass; but I kept getting this error no matter how I arranged it:

You need to insert new basic blocks and update CFG to accomplish this. There is a hackish way to do this right now. Add a pseudo instruction to represent this operation and mark it usesCustomDAGSchedInserter. This means the intrinsic is mapped to a single (pseudo) node. But it is then expanded into instructions that can span multiple basic blocks. See

Hi I want to insert some functions into the llvm bitcode ir files. So I use IRBuilder and CreateCall(). But it how error : inlinable function call in a function with debug info must have a !dbg location. I don't know what DebugLoc should I give the new CallInst to setDebugLoc. I Create this CallInst , so this CallInst doesn't hava so-called "DebugLoc" mapping to the source

Would it be acceptable to change MachineInstr::getRegInfo from private to public so I can use it from PPCTargetLowering::EmitInstrWithCustomInserter? Cheers, Gary Evan Cheng wrote: > Look for createVirtualRegister. These are examples in > PPCISelLowering.cpp. > > Evan > On Jul 8, 2008, at 8:24 AM, Gary Benson wrote: > > > Hi Evan, > > > > Evan Cheng wrote:

Chris Lattner wrote: > On Jun 27, 2008, at 8:27 AM, Gary Benson wrote: > > def CMP_UNRESw : Pseudo<(outs), (ins GPRC:$rA, GPRC:$rB, i32imm: > > $label), > > "cmpw $rA, $rB\n\tbne- La${label}_exit", > > [(PPCcmp_unres GPRC:$rA, GPRC:$rB, imm: > > $label)]>; > > } > > > > ...and