similar to: [LLD][ELF] Symbol/Relocation manipulation.

Displaying 20 results from an estimated 500 matches similar to: "[LLD][ELF] Symbol/Relocation manipulation."

2017 Nov 08
2
[RFC] lld: Dropping TLS relaxations in favor of TLSDESC
On Tue, Nov 7, 2017 at 6:59 PM, Rafael Avila de Espindola < rafael.espindola at gmail.com> wrote: > Rui Ueyama via llvm-dev <llvm-dev at lists.llvm.org> writes: > > > tl;dr: TLSDESC have solved most problems in formerly inefficient TLS > access > > models, so I think we can drop TLS relaxation support from lld. > > > > lld's code to handle
2017 Nov 08
6
[RFC] lld: Dropping TLS relaxations in favor of TLSDESC
tl;dr: TLSDESC have solved most problems in formerly inefficient TLS access models, so I think we can drop TLS relaxation support from lld. lld's code to handle relocations is a mess; the code consists of a lot of cascading "if"s and needs a lot of prior knowledge to understand what it is doing. Honestly it is head-scratching and needs serious refactoring. I'm trying to simplify
2020 Mar 25
2
__builtin_thread_pointer for RISC-V
Hi Devs, since risc-v has a register $tp which is thread pointer. is it possible to have __builtin_thread_pointer for RISC-V? I am not sure what could be corresponding instructions? ./kamlesh
2020 Mar 23
2
RISC-V LLVM sync-up call 19 Mar 2020
Hi, Sam. I think that it's a fair comparison. Keep in mind that the GP is only used to reach global variables of local scope and the GOT, where the address of global variables of global scope reside. This model assumes that the distance between the GP and the global data area, GOT and local scope variables is defined at link time. __ Evandro Menezes ◊ SiFive ◊ Austin, TX > On Mar
2017 Nov 08
2
[RFC] lld: Dropping TLS relaxations in favor of TLSDESC
On Tue, Nov 7, 2017 at 8:16 PM, Rafael Avila de Espindola < rafael.espindola at gmail.com> wrote: > Rui Ueyama <ruiu at google.com> writes: > > >> So I am strongly against removing either non TLSDESC support of support > >> for the relaxations. > >> > > > > It's still pretty arguable. By default, compilers use General Dynamic > model
2015 Jan 22
4
[LLVMdev] FYI: IA-32 psABI draft version 0.1
Here is the link: https://groups.google.com/forum/#!topic/ia32-abi/nq6cvH_VVV4 -- H.J.
2012 Jun 05
2
[LLVMdev] [PATCH] add x32 psABI support
If you are interesting to play around X32, you may refer to http://sourceware.org/glibc/wiki/x32 to bootstrap a local environment on Linux. Yours - Michael -----Original Message----- From: cfe-commits-bounces at cs.uiuc.edu [mailto:cfe-commits-bounces at cs.uiuc.edu] On Behalf Of Liao, Michael Sent: Monday, June 04, 2012 5:09 PM To: llvm-commits at cs.uiuc.edu; cfe-commits at cs.uiuc.edu
2015 Jan 22
2
[LLVMdev] FYI: IA-32 psABI draft version 0.1
On Thu, Jan 22, 2015 at 11:54 AM, Richard Smith <richard at metafoo.co.uk> wrote: > On Thu, Jan 22, 2015 at 4:35 AM, H.J. Lu <hjl.tools at gmail.com> wrote: >> Here is the link: >> >> https://groups.google.com/forum/#!topic/ia32-abi/nq6cvH_VVV4 > > The document contains this claim (as do many other psABI documents): > > "Bit-fields that are neither
2017 Nov 08
2
[RFC] lld: Dropping TLS relaxations in favor of TLSDESC
On Wed, Nov 8, 2017 at 9:33 AM, Rafael Avila de Espindola < rafael.espindola at gmail.com> wrote: > Rui Ueyama <ruiu at google.com> writes: > > >> If you are creating an executable and if your executable is not > >> > position-independent, you're using Initial Exec model by default > which is > >> > as fast as variables accessed through
2020 Nov 12
1
RISC-V LLVM sync-up call 12 November 2020
For background on these calls, see <http://lists.llvm.org/pipermail/llvm-dev/2019-September/135087.html>. Reminder: the purpose is to co-ordinate between active contributors. If you have support questions etc then it's best to post to llvm-dev. We have a call every alternate Thursday at 4pm GMT, via <https://meet.google.com/ske-zcog-spp>. We have a shared calendar which may help
2020 Mar 19
3
RISC-V LLVM sync-up call 19 Mar 2020
For background on these calls, see <http://lists.llvm.org/pipermail/llvm-dev/2019-September/135087.html>. Reminder: the purpose is to co-ordinate between active contributors. If you have support questions etc then it's best to post to llvm-dev. We have a call each Thursday at 4pm GMT, via <https://meet.google.com/ske-zcog-spp>. I've created a shared calendar which may help
2018 Jun 05
2
lld mishandling R_X86_64_PC32 relocations
Hi, I've tracked down what I believe is a bug in lld's relocation processing for R_X86_64_PC32 REL relocations. I'm producing the object file in a slightly unusual way: I'm using objcopy on a relocatable i386 ELF object file to convert it to x86_64 which transforms a R_386_PC32 into a R_X86_64_PC32. Steps to reproduce: 1. Assemble the attached bug.asm using nasm and note the
2020 Jul 10
12
New x86-64 micro-architecture levels
Most Linux distributions still compile against the original x86-64 baseline that was based on the AMD K8 (minus the 3DNow! parts, for Intel EM64T compatibility). There has been an attempt to use the existing AT_PLATFORM-based loading mechanism in the glibc dynamic linker to enable a selection of optimized libraries. But the general selection mechanism in glibc is problematic: hwcaps
2017 Mar 07
2
Current preferred approach for handling 'byval' struct arguments
As many of you will know, handling of struct arguments in LLVM is actually slightly more fiddly than you might expect. For targets where aggregates are always passed on the stack it's easy enough, the Clang ABI code marks these arguments as byval and the call lowering code in LLVM will copy the object to the stack when needed. There are more options for when the target has more complex ABI
2012 Jun 07
0
[LLVMdev] [PATCH] add x32 psABI support
Hi Folks, Anyone got chance to review the patch adding X32 psABI support? Yours - Michael -----Original Message----- From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Liao, Michael Sent: Tuesday, June 05, 2012 11:18 AM To: llvm-commits at cs.uiuc.edu; cfe-commits at cs.uiuc.edu; llvmdev at cs.uiuc.edu; cfe-dev at cs.uiuc.edu Subject: Re:
2018 Mar 20
3
[LLD/ELF] - Should we implement .note.gnu.property and/or Intel CET in LLD ?
Linux GABI [1] introduced new .note.gnu.property section which contains a program property note which describes special handling requirements for linker and run-time loader. LLD does not support .note.gnu.property yet. GABI specifies 2 types of entries: GNU_PROPERTY_STACK_SIZE and GNU_PROPERTY_NO_COPY_ON_PROTECTED: * GNU_PROPERTY_STACK_SIZE: Its pr_data field contains an integer in the format
2016 Jun 03
3
[lld] r271569 - Start adding tlsdesc support for aarch64.
On 3 June 2016 at 18:47, Rui Ueyama <ruiu at google.com> wrote: > Renato, it is not appropriate to call it my and Rafael's pet project. Hi Rui, I apologise, that was wrong in all levels. I know how much other people have contributed, but these people are on the inside already, so their contributions are more easily accepted. We have been trying to contribute for more than a year
2014 Jul 28
2
[LLVMdev] [lld] question on ELF section formating
I've been adding ELF/AArch64 support to lld based off the existing x86_64 code that is already there in lld. I've been able to compile and link a simple "Hello World"-type program. However, I'm getting what appears to be a misplacement/name change of the _start atom. When I do the link, the _start section gets named __tls_get_addr. The code inside this section appears to be
2020 Jul 21
7
New x86-64 micro-architecture levels
* Premachandra Mallappa: > [AMD Public Use] > > Hi Floarian, > >> I'm including a proposal for the levels below. I use single letters for them, but I expect that the concrete implementation of this proposal will use >> names like “x86-100”, “x86-101”, like in the glibc patch referenced above. (But we can discuss other approaches.) > > Personally I am not a big
2016 Apr 19
2
state of the lld linker for aarch64
Hi, Some time ago there were some information about aarch64 support for the lld linker project: http://lld.llvm.org/open_projects.html#elf-aarch64 Right now there is no such information. Also there is some presentation described that the simple application can be linked using lld: http://llvm.org/devmtg/2016-03/Presentations/EuroLLVM%202016-%20New%20LLD%20linker%20for%20ELF.pdf What is the