similar to: Loop Access Analysis

Displaying 20 results from an estimated 100 matches similar to: "Loop Access Analysis"

2019 Dec 22
2
Loop Access Analysis
The Loop Optimization Working Group had a survey about “canonical” loop required by each loop transformation or analysis. That is, what should we normalize a loop before running a certain loop pass. Here is the survey result: https://tinyurl.com/rhuzny2 (Note that there are two workspaces: “By precondition” and “Breakdown”) Best - Min > On Dec 22, 2019, at 2:40 AM, Shraiysh Vaishay via
2019 Aug 08
4
[LLVM] (RFC) Addition/Support of new Vectorization Pragmas in LLVM
Hello all, We are students from Indian Institute of Technology(IIT), Hyderabad, we would like to propose the addition of the following pragmas in LLVM that aide in (or possibly increase the scope of) vectorization in LLVM (in comparison with other compilers). 1. ivdep 2. Nontemporal 3. [no]vecremainder 4. [no]mask_readwrite 5. [un]aligned Could you please
2019 Aug 08
3
[LLVM] (RFC) Addition/Support of new Vectorization Pragmas in LLVM
On 8/8/19 2:03 PM, Hal Finkel wrote: Hi, First, as a high-level note, you posted a link to a Google doc, and at the end of the Google doc, you have a list of questions that you'd like answered. In the future, please put the questions directly in the email. For one thing, more people will read your email than will open your Google doc. Second, having the questions in the email should allow a
2019 Aug 09
3
[LLVM] (RFC) Addition/Support of new Vectorization Pragmas in LLVM
> There is a fundamental problem with the way that ivdep is defined by Intel's current documentation, at least for C/C++. As you note in your Google doc, it essentially says that the optimizer may ignore loop-carried dependencies except for those dependencies it can definitely prove are present. These are not semantics that any other compiler can actually replicate, and is not equivalent to
2016 Oct 10
2
On Loop Distribution pass
> On Oct 10, 2016, at 2:50 PM, Hal Finkel <hfinkel at anl.gov> wrote: > > > From: "Dangeti Tharun kumar via llvm-dev" <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> > To: llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> > Cc: "Santanu Das" <cs15mtech11018 at iith.ac.in <mailto:cs15mtech11018 at
2016 Oct 09
3
On Loop Distribution pass
Dear community, Our team at IITH have been experimenting with loop-distribution pass in LLVM. We see the following results on few benchmarks. clang -O3 -mllvm -enable-loop-distribute -Rpass=loop-distribute file.c clang -O3 -mllvm -enable-loop-distribute -Rpass-analysis=loop-distribute file.c TORCH
2019 Sep 27
3
Question on target-features
Ugh, that would be a “yes” then… -- Krzysztof Parzyszek kparzysz at quicinc.com<mailto:kparzysz at quicinc.com> AI tools development From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of Krzysztof Parzyszek via llvm-dev Sent: Friday, September 27, 2019 10:05 AM To: Dangeti Tharun kumar <cs15mtech11002 at iith.ac.in>; llvm-dev at lists.llvm.org Subject: [EXT] Re:
2017 May 22
5
Default Location of CUDA headers in Windows and macOS
Hello, Can anyone help me with the default installation locations of CUDA headers in Windows and macOS ? e.g. /usr/local/cuda/include is the default for Linux. Thanks, Sanjay -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170522/ca97c66b/attachment.html>
2015 Mar 23
2
[LLVMdev] Mails from IITH marked as spam
Dear Admin, It seems that mails from our iit.ac.in domain are being marked as spam. It would be nice if something could be done about this. Best Regards Ramakrishna On Tue, Mar 24, 2015 at 1:12 AM, Aditya Kamath < adityakamath+llvmdev at gmail.com> wrote: > Hi all, > > (I received many emails that my posts were marked spam, so I am re-sending > this from another email address
2019 Jan 07
2
[Xray] Help with Xray
On Mon, Jan 7, 2019 at 3:21 PM Dean Michael Berris <dean.berris at gmail.com> wrote: > On Mon, Jan 7, 2019 at 8:43 PM Dangeti Tharun kumar > <cs15mtech11002 at iith.ac.in> wrote: > > > > Hi Dean, > > > > I have tried with -instr-map-1 and -instr-map-2, it didn't work. > > > > Yeah, I'm looking through the code and it looks like
2015 Mar 24
2
[LLVMdev] [GSoC] Improvent of PRE in LLVM compiler
Greetings, (I am reposting this email of mine, as I was informed that emails from the domain 'iith.ac.in' are sometimes being marked as spam) I am Aradhya Biswas, final year student of Computer Science and Engineering at Indian Institute of technology Hyderabad (IITH), and as mentioned in my previous email on the LLVM dev mailing list, I am interested to work towards the improvement of
2015 Feb 11
2
[LLVMdev] poolalloc and steensgaard
Hi Daniel, To my knowledge, there is no other implementation available for Steensgaard AA except poolalloc. I have tried Steensgaard AA under LLVM 2.7 poolalloc, but there are lots of bugs which need to be fixed. It will be a good idea to use previous implementation, but you will have to modify (a lot) it with respect to the latest version of LLVM poolalloc. Thanks, -Yogesh -------------- next
2018 Nov 02
2
XMMs unused
On Fri, Nov 2, 2018 at 3:31 PM Anton Korobeynikov <anton at korobeynikov.info> wrote: > > Yes, I am compiling for linux system. > > So the RA will not consider assigning a scratch register to a live range > crossing function call, though it may reduce spills? > Well, it has to spill the register – otherwise it could be clobbered by a > call. May be, I haven't
2020 Nov 02
2
Array access dependencies
Hi all I am relatively new to LLVM and I am still trying to work my way through. What I am trying to implement is a list of array access and indices of the same within loops. I can then probably try to work on dependencies they can have. I have already got all the Basic blocks in a loop and I am looking at load & store instructions to reconstruct array access (casting GEP instructions). I
2020 Nov 18
1
Array access dependencies
Hi, Hopefully the video Michael posted will help you, thanks for posting. It's more useful to the user of these passes than the developer I guess (it describes the theoretical background, hurdles of the implementation etc.). But the two passes we describe, DependenceAnalysis and MemorySSA, have very clean interfaces so you shouldn't have a problem in that matter. You probably want to look
2015 Mar 10
3
[LLVMdev] [GSoc] Liveness Based Flow Sensitive Pointer Analysis for GSoc 2015
Hi all, I'm a 3rd year CSE B.Tech student and have been studying LLVM since the past year. I have written a pass for doing register allocation as part of my course project and have also been studying LLVM code sections related to SSA construction, dominance frontiers,etc. I also made some contributions to the Polly project. Currently I am interested in improving the existing alias analysis
2014 Jun 04
1
[LLVMdev] Not able to run pass
attaching screenshot of errors I got On Wed, Jun 4, 2014 at 11:07 PM, Prashanth Sharma <cs13m1017 at iith.ac.in> wrote: > sir, > that I already applied this.As I followed these steps:-please tell me > whered did i go wrong? > > 1. Checkout LLVM: > - cd LLVM > - svn co http://llvm.org/svn/llvm-project/llvm/trunk llvm > 2. Checkout Clang: >
2016 Mar 21
2
git running very slow
Hello Tim, Thank you for the information. I am wondering if anyone else is facing the same issue? Or it is just that my institute firewall is creating the problem. Regards, Utpal Bora Ph.D. Scholar +917032002001 Computer Science & Engineering IIT Hyderabad On Sun, Mar 20, 2016 at 10:14 PM, Tim Northover <t.p.northover at gmail.com> wrote: > Hi Uptal, > > On 20 March 2016
2019 Aug 13
2
[LLVM] (RFC) Addition/Support of new Vectorization Pragmas in LLVM
vecremainder/novecremainder: Should the pragma simply call the vectorizer to attempt to vectorize the remainder loop, or should the vectorizer use a different method? > > Something like that. There were patches posted at some point to enable tail-loop vectorization. At this point, I imagine that you'd construct a VPlan with the vectorized tail. Yep, committed in
2015 Mar 20
2
[LLVMdev] Function of CorrelatedValuePropagation pass
Hi, I am working on some changes to LazyValueInfo and I wanted to see how it was used in existing passes. Currently I can see that Jump Threading and Correlated Value Propagation are the 2 passes that use LazyValueInfo. However on the LLVM docs page of passes (http://llvm.org/docs/Passes.html <http://llvm.org/docs/Passes.html>), Correlated Value Propagation is not mentioned as a pass. Does