similar to: imm COPY generated by PHI elim not propagated

In this case the load imm is foldable into the copy, once converted to a mov. Directly folding this would be 4 v_mov_b32 instead of 5 produced currently -Matt On 11/14/19, 07:20, "llvm-dev on behalf of Quentin Colombet via llvm-dev" <llvm-dev-bounces at lists.llvm.org on behalf of llvm-dev at lists.llvm.org> wrote: Hi Ryan, Unless you can fold your immediate

This would require getting the reaching definition which requires live intervals analysis. On Thu, Nov 14, 2019 at 12:15 PM Quentin Colombet <qcolombet at apple.com> wrote: > That sounds like the folding could be done when you expand the copy in > expand pseudo after regalloc. > > > On Nov 14, 2019, at 12:20 AM, Arsenault, Matthew < > Matthew.Arsenault at amd.com>

I was looking at writing a pass after PHI elim to do this, just trying to dump the reaching def MIs but get lots of no live segments issues. Have included addREquired and addPreserved for LiveIntervals and setPreservesAll(). -Ryan On Fri, Nov 15, 2019 at 2:58 PM Quentin Colombet <qcolombet at apple.com> wrote: > You could do it after RA and before rewrite, when you still have the live

Hi, This patch adds R600/SI disassembly text to compiled object files, when a code dump is requested, to assist debugging in Mesa clients. Here's an example of the output in a Mesa client with a corresponding patch and RADEON_DUMP_SHADERS set: Shader Disassembly: S_WQM_B64 EXEC, EXEC ; BEFE0A7E S_MOV_B32 M0, SGPR6 ; BEFC0306

On Wed, Oct 09, 2013 at 08:06:42PM -0500, Jay Cornwall wrote: > Hi, > > This patch adds R600/SI disassembly text to compiled object files, when > a code dump is requested, to assist debugging in Mesa clients. > > Here's an example of the output in a Mesa client with a corresponding > patch and RADEON_DUMP_SHADERS set: > > Shader Disassembly: > >

On 04/20/2015 01:25 PM, David Majnemer wrote: > These optimizations are not always run on IR that is fed to the backend. The DAG combiner also performs the undefined shift -> undef though, so it should still be OK -Matt

I have this problem: google-perftools fails to detect stack for the code run under JIT called through C++ api from my program. It shows in profile like all program is one block with the name _init. I clearly do set the option NoFramePointerElim and I do see how it makes a difference in stack frame under gdb. When running some code in JIT in lli (with option -disable-fp-elim) google perftools

Hi all, Is there a way to specify an attribute in a .ll file so that it will disable fp elim as if llc has been invoked with -disable-fp-elim on command line ? Thanks for your answers Best Regards Seb -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120308/1d4875f1/attachment.html>

The generic code in lib/CodeGen has no knowledge of these semantic differences. This knowledge is only available on a per-target basis. Typical query functions would be X86InstrInfo::getMemOpBaseRegImmOfs(...) or AArch64::getMemOpInfo(...). Doing this in a common way accross targets requires callbacks in TargetInstrInfo, there seem to be some in that direction but they appear to be rarely used so

Hi, I have a function with: attributes #2 = { "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" } Yet when compiling it generates: https://gist.github.com/carlokok/7c3c98d2fd8c966671f40a5ad94f19d3 (Note how it checks fFinalizer before setting up ebp). It also has a: .loc 36 195 7 prologue_end before this happens How can I get llvm to do the frame

So I'd like to be able to tell the difference between an imm and an imm used in mem offset in MachineInstr. Or, it would be nice to tell the difference between src and dst operands. I must be missing something trivial? For example, int *b, a; b[10] = a + 2; // is there any marker/flag between 2 and 10 to tell the difference? Thanks. -------------- next part -------------- An HTML

For example: unsigned int x, y; void foo() { y = x >> 129; } Where int is a 16bit type, the .ll is producing only 'ret void' at O3. At O0 the .ll looks fine but then llc gets rid of it an simply returns. I'm just curious what the reasoning is for this? It isn't trying to set y to anything at all. Thanks. -------------- next part -------------- An HTML attachment was

There can also be other “problems" like this one: http://reviews.llvm.org/D6946 <http://reviews.llvm.org/D6946> - Matthias > On Apr 20, 2015, at 1:44 PM, Tim Northover <t.p.northover at gmail.com> wrote: > >> The DAG combiner also performs the undefined shift -> undef though, so it >> should still be OK > > DAG combiner doesn't really run to

On 06/23/2010 10:24, Reid Kleckner wrote: > You said this is on 32-bit x86? My understanding is that in that > case, gdb will use ebp/esp to unwind the stack and doesn't need dwarf. > It may have different behavior on FreeBSD if frame pointers are > normally omitted on that platform. gdb ignores them on Linux x86_64 > because they are generally omitted. > > This might

Ok, this makes sense. So, my follow up is then why, as in Mips, R600, etc... the bit value is checked in the tablegen. Seems that we should expect it to fit anyways if it still exists at this point? I'm having a hard time trying to get shl to take a PatLeaf for Imm instead of an ImmLeaf. On Mon, Apr 20, 2015 at 4:11 PM, David Majnemer <david.majnemer at gmail.com> wrote: > >

You said this is on 32-bit x86? My understanding is that in that case, gdb will use ebp/esp to unwind the stack and doesn't need dwarf. It may have different behavior on FreeBSD if frame pointers are normally omitted on that platform. gdb ignores them on Linux x86_64 because they are generally omitted. This might actually be the best explanation for your symptoms, since this is what a gdb

I have this situation when the same code SEGVs in JIT with option -disable-fp-elim and works fine without it. How can this possibly happen? Is it possible that there is a bug in JIT that stack isn't properly lowered for local variables when prologs are present? Or maybe JIT can accidentally use ebp for some values when it's supposed to be only used by frame pointer value. Stack (see

On 2017-04-26 19:56, Eric Christopher wrote: > That's really weird. I'm quite surprised that the entry block was moved > so much later in the function but haven't had a chance to look more at > it. Probably want to take a look and find out where that's happening and > why. From irc, thegameg helped me find the -enable-shrink-wrap=false, which "fixes" this,

Hi, I have added Branch condition BGEID like below… *def : Pat<(brcond (setcc (i32 GR32:$L), (i32 GR32:$R), SETGE), bb:$T),* * (BGEID (CMP GR32:$L, GR32:$R), bb:$T)>;* *def BGEID : TBT<0b101110, (outs), (ins GR32:$ra, brtarget:$offset), "bgeid\t$ra,$offset", [], IIC_BRc> {* * let rd = 0b10101;* *}* *def brtarget : Operand<OtherVT>* *{*

Add a specific optimisation pass for NV50 to check whether SRC0 or SRC1 is a MOV dst, IMM. If so: fold the IMM in and try to drop the MOV. Must be done post-RA because it is required that SDST == SSRC2. Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git