similar to: Semantics of LLVM IR intermediate variables

Displaying 20 results from an estimated 30000 matches similar to: "Semantics of LLVM IR intermediate variables"

2010 Jan 08
0
[LLVMdev] First-class aggregate semantics
Hi Dustin, > I think I'm missing something basic about the semantics of returning an > aggregate type (in my case, a structure) from a function. Returning a > structure containing only compile-time constants is simple enough. But > I don't quite get how this works with a struct composed at run-time. If > I constructed it on the stack with alloca, would I be letting a
2015 Mar 16
2
[LLVMdev] Question: Motivation of the semantics of the undefined value?
Dear LLVMdev, We have a question regarding the semantics of the undefined value in LLVM IR. As far as we understand, in order to give a semantics to the undefined value, the semantics of LLVM IR is generalized to a rather unusual set-based semantics. More specifically, the notion of value in LLVM IR is generalized to a set of values, rather than a single value. Then the undefined value is simply
2010 Jan 07
5
[LLVMdev] First-class aggregate semantics
I think I'm missing something basic about the semantics of returning an aggregate type (in my case, a structure) from a function. Returning a structure containing only compile-time constants is simple enough. But I don't quite get how this works with a struct composed at run-time. If I constructed it on the stack with alloca, would I be letting a stack variable escape to to a context
2013 Jul 28
1
[LLVMdev] Questions about the semantics for lifetime intrinsics...
So, in hacking on mem2reg I noticed that it doesn't actually implement optimizations enabled by lifetime markers. I thought I might take a stab at teaching it about them, but I'm left with some questions about the semantics. Much of this may have been hash out when they were added, and if so I'll appreciate your help educating me, and maybe we can come up with improved documentation to
2020 Apr 15
2
Various Intermediate Representations. IR
On Tue, 14 Apr 2020 at 21:24, Michael Kruse <llvmdev at meinersbur.de> wrote: > > Currently, LLVM often uses the *i8 type (pointer to char) to represent > a pointer to some not-specified type. We are also working on replacing > the pointer-to-type pointer types by a single pointer type without a > specific pointee-type. Look for "opaque pointer" on llvm-dev and the
2011 Oct 05
2
[LLVMdev] LLVM IR is a compiler IR
All, I should have chimed in earlier, but have been working on two more side-channel variants of this conversation. At the beginning the PNaCl team was strongly pushing for trying to keep platform ABI compatibility on all platforms while taking one portable bitcode stream as input. During the discussions we've had over the past few weeks it became obvious that that is simply not tractable,
2014 Sep 20
2
[LLVMdev] How to translate library functions into LLVM IR bitcode?
Hi Johannes, By following your directions, I can use your script as is to produce the .bc file now. Here's my command line for compiling s_sin.c into s_sin.bc file and the output: command line: ~/Downloads/newlib-2.1.0/newlib/libm/mathfp » python ~/llvm_link.py s_sin.c -I../common/ -I../../libc/include/ -o s_sin.bc output: Initiate CLANG (/path-to-clang): Options: 's_sin.c
2020 Apr 14
3
Various Intermediate Representations. IR
Hi, I am looking for an IR that is similar to LLVM IR, with its SSA form, module->function->block->instruction etc. But, I wish a much reduced type model. I wish only three types: 1) An Integer of various bit-widths. 2) A pointer, but a pointer that does not need to point to a known type. A sort of "pointer to unknown type". 3) Floats of various varieties. For example, if we
2018 Mar 18
1
`free` counterpart to `alloca`, or way to lift to function home
I'm unintentionally allocating too much space on the stack by using `alloca` inside a loop. To fix this I will do my `alloca` outside of the loop itself.  I'm wondering if there is a way for this to be automatically done: given alloca a function scope, rather than loop scope. I'm curious also, since this actually allocates each time in the loop, is there a way to say the stack
2019 May 17
2
Semantics for non-byte-sized stores? (or whenever "store size in bits" is different than "size in bits")
It is possible to ask DataLayout about getTypeSizeInBits and also getTypeStoreSize. And there is a table showing an example of what it could look like: /// Size examples: /// /// Type SizeInBits StoreSizeInBits AllocSizeInBits[*] /// ---- ---------- --------------- --------------- /// i1 1 8 8 /// i8 8 8
2013 Dec 04
3
[LLVMdev] Quick doubt about IR
Hi, While looking over the IR generated by my source code, I came across the following: %arr = alloca [30 x i8], align 1 In the source code this particular line of code is represented by: int arr[30]; I was wondering how I could change the capacity of arr from 30 to any other integral value via a function-pass. I know that 'alloca' can be used for reserving space on stack; further,
2016 Feb 09
2
Modified LLVM IR
Hi, I want to edit LLVM generated IR file, like as given below, Original LLVM IR file, @.str2 = private unnamed_addr constant [17 x i8] c"\0AI am in one_11\0A\00", align 1 ; Function Attrs: nounwind define i32 @one_1(i32 %ivar1, i32 %ivar2) #0 { entry: %ivar1.addr = alloca i32, align 4 %ivar2.addr = alloca i32, align 4 %isum = alloca i32, align 4 store i32 %ivar1, i32*
2017 May 25
3
UD and DU chains for LLVM IR before running mem2reg
Hi, Just had a simple question , The use-def and def-use chains provided by llvm::Value class , would they work for IR that has not been optimized by the "mem2reg" pass ? ( ie, IR code that contains memory interactions and is not in SSA form yet ) Thanks, Malhar -------------- next part -------------- An HTML attachment was scrubbed... URL:
2013 Jul 05
1
[LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
Le 5 juil. 2013 à 17:48, Arnold Schwaighofer <aschwaighofer at apple.com> a écrit : > > On Jul 5, 2013, at 10:43 AM, Stéphane Letz <letz at grame.fr> wrote >> >> 1) "entry" block is the first block of the function right? > > Yes. OK > >> >> 2) do you mean *all* "alloca" in a function always have to be in the fist entry
2017 Oct 29
2
A query language for LLVM IR (XPath)
Hi, sometimes when dealing with LLVM IR getting to a desired point of the code is a bit cumbersome, in particular if you're instrumenting existing code. A lot of nested loops and if checks. Maybe all of this could be avoided by employing a query language. Since an LLVM module can be seen as a sort of tree with attributes, I think that reusing an existing query language for XML would be
2020 Apr 16
2
Various Intermediate Representations. IR
On Wed, 15 Apr 2020 at 17:28, David Blaikie <dblaikie at gmail.com> wrote: > > opaque pointers don't exist in the IR yet - the goal is to reduce the places that use non-opacity of pointer types already/today and then opacify the existing pointer type, rather than introducing an opaque pointer type & having it concurrently with non-opaque pointer types. (though in retrospect
2016 Feb 10
2
Modified LLVM IR
Hi, I want to call/add some functions(that defined in another file) on top of some functions, and reflect the same changes in object file. No, I am not looking for contractor. Thanks, Deepika On Tue, Feb 9, 2016 at 7:04 PM, mats petersson <mats at planetcatfish.com> wrote: > What is the condition for adding this code? > > What have you tried so far? [Or are you looking for a
2013 Dec 04
0
[LLVMdev] Quick doubt about IR
Create a new alloca instruction, insert it into the IR right before (or after) the old one, RAUW the value, then delete the old instruction. You should be able to find a variety of examples of this sort of thing in most of the IR level optimization passes. I’d look at InstCombine in particular. -Jim On Dec 4, 2013, at 1:40 PM, Shivam Bhagi <shivam.bhagi at outlook.com> wrote: > Hi,
2014 Nov 18
2
[LLVMdev] RFC: How to represent SEH (__try / __except) in LLVM IR
> On Nov 17, 2014, at 5:50 PM, Reid Kleckner <rnk at google.com> wrote: > > On Mon, Nov 17, 2014 at 5:22 PM, Bob Wilson <bob.wilson at apple.com <mailto:bob.wilson at apple.com>> wrote: > I don’t know much about SEH and haven’t had time to really dig into this, but the idea of outlining functions that need to know about the frame layout sounds a bit scary. Is it
2017 Oct 25
3
How vregs are assigned to operands in IR
Hi, I'm trying to understand how virtual regs are assigned to operands in IR instructions. I looked into SelectionDAG but could not figure out where the assignment happens. How and where does this conversion happen? Furthermore, I want to build a map between variable and the virtual register (x corresponds to vreg11 in below code). I've been stuck here for a while. Any help is greatly