Displaying 20 results from an estimated 700 matches similar to: "Having trouble getting started on writing a WDC 65816 backend"
2019 Jul 12
0
Having trouble getting started on writing a WDC 65816 backend
Sorry about the "Sent by Migadu" message at the bottom of these emails. I looked through settings but I don't know how to get rid of it.
July 10, 2019 1:29 PM, "Tim Northover" <t.p.northover at gmail.com> wrote:
> As I recall the big one is that LLVM isn't well adapted to instruction
> sets without fungible registers.
What does this mean exactly? How does
2019 Jul 17
1
Having trouble getting started on writing a WDC 65816 backend
July 15, 2019 1:16 PM, "Bruce Hoult" <brucehoult at sifive.com> wrote:
> Take, for example, RISC-V. You have 32 registers that, in the base
> fixed-length 32 bits long instruction set, are absolutely
> interchangeable with each other. No instructions use implicit source
> or destination registers, any register can be used for anything. There
> is no fixed stack
2004 Nov 25
4
Callus, Mame and other emulators
Hi!
I'd like to play with snes, arcade and other retro games, but unfortunatelly
there isn't any linux emus for this.
So I run the emutaltor callus with wine, with medius succes: Callus works
fine, everything is ok, but it uses 100% CPU, and becouse of that, the soung
goes wrongs somethimes.
I don't know why it is takes so mutch work to wine... Callus emulate only 66
Mhz...
The
2010 Aug 03
2
[LLVMdev] Creating a backend target -- must I modify include/llvm/ADT/Triple.h ?
I'm having a go at writing an LLVM backend for the WDC 65816. The
documentation page on writing an LLVM
backend<http://llvm.org/docs/WritingAnLLVMBackend.html>gives this
example of target registration:
extern "C" void LLVMInitializeSparcTargetInfo() {
RegisterTarget<Triple::sparc, /*HasJIT=*/false>
X(TheSparcTarget, "sparc",
2013 Mar 23
1
warning: Could not retrieve fact fqdn
Hi;
After applying this pp i get this error.
*file {''/tmp/test1'':*
* ensure => present,*
* content => "Hi.",*
* }*
*
*
* file {''/tmp/test2'':*
* ensure => directory,*
* mode => 0644,*
* }*
*
*
* file {''/tmp/test3'':*
* ensure => link,*
* target =>
2020 Jan 29
2
ELF EM value for 65816
Hello, I’m working on porting llvm to build for 65816, and I wanted to use
a value of e_machine for this. I was wondering if there is a process for
getting a value reserved. I’ve seen some information but its from many
years ago, and seems to be well out of date? Just wanted to ask people who
would likely know.
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
2008 Aug 23
2
Wine - ARM - Pandora Handheld
A quick, and probably a silly few questions regarding Wine & ARM support.
In a few months time, a new hand held created by a open source community is going to be released. More specificity Pandora: http://openpandora.org/
Its going to run with the following specs:
* ARM? Cortex?-A8 600Mhz+ CPU running Linux
* 430-MHz TMS320C64x+? DSP Core
* PowerVR SGX OpenGL 2.0 ES compliant 3D
2002 Jan 18
1
quick question
vcut (windows): what do you put in for the cutpoint (ex. how many numbers)
and how do you find out these numbers (ex. how do you find out what the
point in the file you want to cut it at is)
Andy
andycool22@peoplepc.com
AndyCool22 on AIM
http://livejournal.com/~andycool22
<p><p>--- >8 ----
List archives: http://www.xiph.org/archives/
Ogg project homepage:
2012 Dec 10
2
[LLVMdev] [MC] [llvm-mc] Getting target specific information to <target>ELFObjectWriter
Here are some examples using the gnu assembler reacting to the same input file with different commandline options.
These are using the GCC assembler on hello.c
// abi o32, arch mips32r2, relocation model pic+cpic
mips-linux-gnu-as -mips32r2 -EL -KPIC -o hello_gas.o hello_gas.s
e_flags 0x70001007 EF_MIPS_NOREORDER EF_MIPS_PIC EF_MIPS_CPIC E_MIPS_ABI_O32 EF_MIPS_ARCH_32R2
// abi
2012 Dec 08
0
[LLVMdev] [MC] [llvm-mc] Getting target specific information to <target>ELFObjectWriter
On 7 December 2012 18:57, Carter, Jack <jcarter at mips.com> wrote:
> Hi Rafael,
>
> There are a lot of flags. Here are the ones you ask about:
>
> -KPIC, -call_shared generate SVR4 position independent code
> -call_nonpic generate non-PIC code that can operate with DSOs
> -mvxworks-pic generate VxWorks position independent code
> -non_shared
2012 Dec 11
0
[LLVMdev] [MC] [llvm-mc] Getting target specific information to <target>ELFObjectWriter
On Dec 10, 2012, at 1:15 PM, "Carter, Jack" <jcarter at mips.com> wrote:
> Here are some examples using the gnu assembler reacting to the same input file with different commandline options.
>
> These are using the GCC assembler on hello.c
> // abi o32, arch mips32r2, relocation model pic+cpic
> mips-linux-gnu-as -mips32r2 -EL -KPIC -o hello_gas.o hello_gas.s
>
2012 Dec 07
2
[LLVMdev] [MC] [llvm-mc] Getting target specific information to <target>ELFObjectWriter
Hi Rafael,
There are a lot of flags. Here are the ones you ask about:
-KPIC, -call_shared generate SVR4 position independent code
-call_nonpic generate non-PIC code that can operate with DSOs
-mvxworks-pic generate VxWorks position independent code
-non_shared do not generate code that can operate with DSOs
-xgot assume a 32 bit GOT
Just to make things fun, the SGI notion of cpic (call pic)
2012 Dec 11
2
[LLVMdev] [MC] [llvm-mc] Getting target specific information to <target>ELFObjectWriter
Jim,
You are correct: MipsSubtarget.
For llvm-mc we have a straight MCSubtargetInfo object. For llc we get a MipsSubtarget object which derives from MipsGenSubtargetInfo which derives from TargetSubtargetInfo which derives from MCSubtargetInfo.
The patch I hope to send out for review will do this:
Add a new data member to MCSubtargetInfo base class. It will be a set of integers that is used or
2019 Mar 10
8
[Bug 109952] New: nv106 nv108 confusion
https://bugs.freedesktop.org/show_bug.cgi?id=109952
Bug ID: 109952
Summary: nv106 nv108 confusion
Product: xorg
Version: unspecified
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity: normal
Priority: medium
Component: Driver/nouveau
Assignee: nouveau at
2020 Mar 09
2
Manipulating Arch specific code generator state
Hello all on the list,
I’m developing a backend for the 65816, however, I need a way to store some
state, as processor flags can affect how instructions operate (including
the length of some), as well as the calling convention. I need to track for
each of these flags (x, m, and e) Set, Unset, Indeterminate. I was
wondering if there was a nice way to store this with the MBB, so I can make
sure
2009 Oct 21
1
re ferring to data of previous rows
Dear Rlers,
in the following dataset I would like to insert a new column that refers to
the data of the previous row.
My question is whether the probability of a female (Id) changes if she had
given birth to a pup in the previous year. So my dataframe consists of the
column Id, year (2003-2007 for each Id) and offspring (=of; 1-0):
Id year of
1 2003 1
1 2004 0
1
2020 May 04
2
[EXTERNAL] How to get branch coverage by using 'source-based code coverage'
Hi, Alan
Thanks for making it clear. But I was more confused now :(
I tested on a simple program and used both gcov and lcov to get branch
coverage.
The code and build commands as below:
*Example simple.cc*
#include <string>
// If not comment this line, the branch coverage won't reach to 100%
// #include <iostream>
int main(int argc, const char* argv[]) {
std::string str =
2009 Nov 25
2
difference of two rows
Dear R user,
I'd like to calculate the difference of two rows, where "ID" is the same.
eg.: I've got the following dataframe:
ID YEAR
13 2007
15 2003
15 2006
15 2008
21 2006
21 2007
and I'd like to get the difference, like this:
ID YEAR diff
13 2007 NA
15 2003 3
15 2006 2
15 2008 NA
21 2006 1
21 2007 NA
that should be fairly
2008 Dec 01
4
Is SUNWhd for Thumper only?
I read Ben Rockwood''s blog post about Thumpers and SMART
(http://cuddletech.com/blog/pivot/entry.php?id=993). Will the SUNWhd
package only work on a Thumper? Can I use this on my snv_101 system
with AMD 64 bit processor and nVidia SATA?