similar to: llvm.set.loop.iterations

Displaying 20 results from an estimated 10000 matches similar to: "llvm.set.loop.iterations"

2019 Apr 11
2
Upper case vs lower case in printed and parsed MIR
I am confused about the rules for when upper and lower case letters should be used in MIR. As an example our downstream target has upper case letters in its sub-register indices and as a result we cannot import exported MIR without manually 'lower casing' it first which is obviously rather annoying. Looking in https://llvm.org/docs/MIRLangRef.html it is stated that instruction names are
2018 Nov 08
2
Completeness of -print-after-all
Fedor, Yes that is what happens in my case that the loop is fully unrolled and hence ‘removed’. My objection though is that there is still IR that could be dumped (i.e. the function containing the loop that was removed or the entire module) and that is what I want to have dumped after each pass when I specify -print-after-all. Of course there may be certain implementation details that could make
2019 Jan 02
2
AA pass dependencies
On Wed, Jan 2, 2019 at 1:34 AM Markus Lavin <markus.lavin at ericsson.com> wrote: > To be more specific I am trying to use LVI from inside BasicAA to improve > some cases that turned out to be relevant for our downstream target. > > > > The code is in https://reviews.llvm.org/D55107 and I have problems with a > failing assert in the LazyValueInfoWrapperPass destructor
2020 Sep 10
2
LSR breaks debug info
The Loop Strength Reduction pass appears to break debug information even for the most basic input. I believe this is a well known issue already (see https://bugs.llvm.org/show_bug.cgi?id=38815) but I also believe that it deserve some extra attention. Consider the following input compiled with 'clang -g -O3 foo.c -mllvm -print-after-all' --- void foo(unsigned char *p) { #pragma clang loop
2020 May 19
2
LV: predication
Invitation accepted, I am happy to help out with reviews, like I did with the previous VP patches. And of course agreed that things should be well defined, and that we shouldn't paint ourselves in a corner, but I don't think that this is the case. And it's not that I am in a rush, but I don't think this change needs to be predicated on a big change landing first like the LV
2018 Dec 31
1
AA pass dependencies
The management of passes in the legacy PM is ... highly confusing. Do you have a specific problem you're trying to solve or a specific question? On Thu, Dec 27, 2018 at 6:47 AM Markus Lavin via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi, > > > Looking at the output of e.g. > > > llc -mtriple=x86_64-unknown-linux-gnu test/CodeGen/X86/pre-coalesce.ll >
2020 May 19
3
LV: predication
Hi Simon, Thanks for reposting the example, and looking at it more carefully, I think it is very similar to my first proposal. This was met with some resistance here because it dumps loop information in the vector preheader. Doing it this early, we want to emit this in the vectoriser, puts a restriction on (future) optimisations that transform vector loops to honour/update/support this intrinsic
2020 May 18
2
LV: predication
> You have similar problems with https://reviews.llvm.org/D79100 The new revision D79100<https://reviews.llvm.org/D79100> solves your comment 1), and I don't think your comments2) and 3) apply as there are no vendor specific intrinsics involved at all here. Just to quickly discuss the optimisation pipeline, D79100<https://reviews.llvm.org/D79100> is a small extension for the
2018 Dec 27
2
AA pass dependencies
Hi, Looking at the output of e.g. llc -mtriple=x86_64-unknown-linux-gnu test/CodeGen/X86/pre-coalesce.ll -debug-pass=Executions Why is it that 'Basic Alias Analysis (stateless AA impl)' is freed much earlier than 'Function Alias Analysis Results' even though the latter depends on the former (at least AFAICT by looking at lib/Analysis/AliasAnalysis.cpp)? Thanks! -Markus
2018 Nov 08
2
Completeness of -print-after-all
Hi, I recently worked on an issue where I realized that -print-after-all does not cover all passes run by the pass manager. E.g. it seems that loop passes are not fully covered and I could find that loop transformations showed up in the dump of the next non-loop pass (which happened to be 'Combine redundant instructions' and that was rather confusing). Specifying both -print-before-all
2020 May 04
3
LV: predication
Hi Roger, That's a good example, that shows most of the moving parts involved here. In a nutshell, the difference is, and what we would like to make explicit, is the vector trip versus the scalar loop trip count. In your IR example, the loads/stores are predicated on a mask that is calculated from a splat induction variable, which is compared with the vector trip count. Illustrated with your
2020 May 18
2
LV: predication
Hi, I abandoned that approach and followed Eli's suggestion, see somewhere earlier in this thread, and emit an intrinsic that represents/calculates the active mask. I've just uploaded a new revision for D79100 that implements this. Cheers. ________________________________ From: Simon Moll <Simon.Moll at EMEA.NEC.COM> Sent: 18 May 2020 13:32 To: Sjoerd Meijer <Sjoerd.Meijer at
2020 Aug 07
2
Branches which return values in SelectionDAG
Hi all, I am working on modeling an instruction similar to SystemZ's 'BRCT', which takes a register, decrements it, and branches if the register is nonzero. I saw that the LLVM backend for SystemZ generates the instruction in a MachineFunctionPass as part of a pass intended to eliminate or combine compares. I then looked at ARM, where it uses the HardwareLoops pass first, and then a
2017 Jun 30
2
LoopSimplify pass prevents loop unrolling
On 6/30/2017 7:48 AM, Balaram Makam via llvm-dev wrote: > > Edit. Predecessor -> successor. > > *From:* llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] *On Behalf > Of *Balaram Makam via llvm-dev > *Sent:* Friday, June 30, 2017 10:47 AM > *To:* llvm-dev at lists.llvm.org > *Subject:* [llvm-dev] LoopSimplify pass prevents loop unrolling > > Hi All, > >
2019 Jan 25
2
Concatenating DWARF location expressions
> From: aprantl at apple.com <aprantl at apple.com> > Since it sounds like the problem is only with implicit descriptions, would a rule > such as "if the expression has a DW_OP_stack_value, add an extra > DW_OP_deref" work for the PrologueEpilgueInserter or do we need > something more principled? Right, that could very well be sufficient for this particular case so
2017 Jun 30
2
LoopSimplify pass prevents loop unrolling
Hi All, In the attached test case there, is an unnested loop with 2 iterations. The loop latch block is terminated by an unconditional branch, so simplifycfg folds the almost empty latch block into its predecessor which is the loop header. This results in an additional backedge in the CFG, so when LoopRotate pass is called it canonicalizes the loop into a nested loop. However, now the loop
2017 Jun 30
2
LoopSimplify pass prevents loop unrolling
On 6/30/2017 11:38 AM, Balaram Makam wrote: > > Thanks Eli, > > I was looking at this code which keeps track of loop headers but is > checking if the destination of branch is a loop header sufficient? > This prevents merging empty preheaders into the loop headers as well. > There isn't really any reason to collapse preheaders anyway; LoopSimplify will recreate them,
2010 Jan 25
2
[LLVMdev] Find all backedges of CFG by MachineDominatorTree. please look at my jpg.
Hi: I hope to cut all backedges of MachineFunction CFG, then topological sort MachineBasicBlocks. 1. MachineDominatorTree *domintree = new MachineDominatorTree(); domintree->runOnMachineFunction(mf); 2. Then travel mf one by one. When domintree->dominates(next,current) is true, there is a backedge from current node to next node. move this backedge form CFG. But I find A LOOP in
2017 Jun 30
0
LoopSimplify pass prevents loop unrolling
I will try to reduce a test case for the regression I found and will update. Thanks, Balaram From: Friedman, Eli [mailto:efriedma at codeaurora.org] Sent: Friday, June 30, 2017 2:54 PM To: Balaram Makam <bmakam at codeaurora.org>; llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] LoopSimplify pass prevents loop unrolling On 6/30/2017 11:38 AM, Balaram Makam wrote: Thanks Eli,
2010 Jan 25
0
[LLVMdev] Find all backedges of CFG by MachineDominatorTree. please look at my jpg.
2010/1/25 任坤 <hbrenkun at yahoo.cn>: > Hi: > > I hope to cut all backedges of MachineFunction CFG, then topological sort MachineBasicBlocks. > > 1. MachineDominatorTree *domintree = new MachineDominatorTree(); > domintree->runOnMachineFunction(mf); > > 2. Then travel mf one by one. > When domintree->dominates(next,current) is true, there is a backedge